Abstract: In a signal detection apparatus, a quadrature detection circuit subjects a reception signal to quadrature detection. An intensity detection circuit detects a signal intensity by referring to an absolute value of an amplitude of a signal subjected to quadrature detection. A zero cross detection circuit detects the number of times of zero crosses of the signal in a predetermined period of time that is based on a modulation index of the reception signal. A signal determination circuit that determines that the signal is the reception signal when the signal intensity is equal to or higher than a threshold value and the number of times of zero crosses is within a predetermined range.

Abstract: In a signal detection apparatus, a quadrature detection circuit subjects a reception signal to quadrature detection. An intensity detection circuit detects a signal intensity by referring to an absolute value of an amplitude of a signal subjected to quadrature detection. A zero cross detection circuit detects the number of times of zero crosses of the signal in a predetermined period of time that is based on a modulation index of the reception signal. A signal determination circuit that determines that the signal is the reception signal when the signal intensity is equal to or higher than a threshold value and the number of times of zero crosses is within a predetermined range.

Abstract: A noise squelch processor generates a noise squelch determination signal by comparing a noise level and a threshold value with each other. A carrier detector generates a carrier determination signal indicating whether or not a reception signal is present based on a signal strength of the reception signal. An integrator controller controls an integrator to set a cutoff frequency of the integrator to a second cutoff frequency higher than a first cutoff frequency at a first timing when the carrier detector generates a carrier determination signal indicating that the reception signal is present, and to switch the cutoff frequency of the integrator from the second cutoff frequency to the first cutoff frequency at a second timing after an elapse of a predetermined period from the first timing.

Abstract: A noise squelch processor generates a noise squelch determination signal by comparing a noise level and a threshold value with each other. A carrier detector generates a carrier determination signal indicating whether or not a reception signal is present based on a signal strength of the reception signal. An integrator controller controls an integrator to set a cutoff frequency of the integrator to a second cutoff frequency higher than a first cutoff frequency at a first timing when the carrier detector generates a carrier determination signal indicating that the reception signal is present, and to switch the cutoff frequency of the integrator from the second cutoff frequency to the first cutoff frequency at a second timing after an elapse of a predetermined period from the first timing.

Abstract: A receiving circuit includes a receiver configured to receive a signal, a detector configured to detect arrival of a reception signal based on a signal received by the receiver, a buffer configured to store therein data corresponding to the reception signal, a demodulation processor configured to demodulate data to be supplied, and a controller configured to store the data corresponding to the reception signal in the buffer when the detector does not detect the arrival of the reception signal, and to supply the data stored in the buffer to the demodulation processor when the detector detects the arrival of the reception signal.

Abstract: A receiving circuit includes a receiver configured to receive a signal, a detector configured to detect arrival of a reception signal based on a signal received by the receiver, a buffer configured to store therein data corresponding to the reception signal, a demodulation processor configured to demodulate data to be supplied, and a controller configured to store the data corresponding to the reception signal in the buffer when the detector does not detect the arrival of the reception signal, and to supply the data stored in the buffer to the demodulation processor when the detector detects the arrival of the reception signal.