Patents by Inventor Hideaki Takemori

Hideaki Takemori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240002411
    Abstract: The present invention relates to a method for producing a radioactive zirconium-labeled complex that can realize a high labeling index in a reaction between a radioactive zirconium ion and a ligand compound. The production method of the present invention includes a step of reacting a radioactive zirconium ion with a ligand compound in a reaction solution containing water to coordinate the radioactive zirconium ion. This step is performed in a state where the pH of the reaction solution is in an acidic region. The reaction solution does not contain an organic solvent but contains a water-soluble organic compound having one or two sulfo groups or carboxy groups in its structure, separately from the ligand compound.
    Type: Application
    Filed: October 14, 2021
    Publication date: January 4, 2024
    Applicant: NIHON MEDI-PHYSICS CO., LTD.
    Inventors: Hideaki TAKEMORI, Hiroaki ICHIKAWA, Minoru KAWATANI, Akihiro IZAWA, Tomoyuki IMAI
  • Publication number: 20230248854
    Abstract: The production method of a radioactive metal-labeled antibody of the present invention includes a step of conducting a click reaction of a radioactive metal complex and an antibody site-specifically modified with a peptide to produce a radioactive metal-labeled antibody. The click reaction is performed between a first atomic group of the radioactive metal complex and a second atomic group directly or indirectly linked to the peptide. The second atomic group is an atomic group containing an azide group, or an atomic group containing trans-cyclooctene.
    Type: Application
    Filed: October 16, 2020
    Publication date: August 10, 2023
    Applicant: NIHON MEDI-PHYSICS CO., LTD.
    Inventors: Akihiro IZAWA, Yu OGAWA, Hiroaki ICHIKAWA, Minoru KAWATANI, Hideaki TAKEMORI, Yuki OKUMURA
  • Publication number: 20220248537
    Abstract: The object of the invention is to provide a double-sided circuit non-oxide-based ceramic substrate excellent in radiation property and low in cost, and a method for manufacturing the same. A double-sided circuit non-oxide-based ceramic substrate related to the present invention includes a high heat-conductive non-oxide-based ceramic substrate that includes a through hole, a holding layer that is formed on a wall surface of the through hole, and an electro-conductive metal section that is held inside the through hole by the holding layer and does not include an active metal. The double-sided circuit non-oxide-based ceramic substrate related to the present invention preferably includes electrodes (thin film electrodes) that shield end surfaces of the holding layer and end surfaces of the electro-conductive metal section which are exposed to front and back surfaces of the ceramic substrate.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Inventors: Hideaki TAKEMORI, Satoshi HIGASHIYAMA, Toru ITAGAKI
  • Patent number: 11011465
    Abstract: A single crystal silicon carbide substrate includes a substrate of a single crystal silicon carbide; a first wiring film and a second wiring film disposed on one side of the substrate and having therebetween an interstice which is formed continuously without being broken from a first end of the one side to a second end of the one side; and an insulating portion disposed in the interstice between the first wiring film and the second wiring film and including a surface texture of the one side exposed by removing using dry etching a surface contaminated layer which is contaminated by at least one of iron, aluminum, chromium, or nickel adhered thereto.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: May 18, 2021
    Assignee: Hitachi Power Solutions Co., Ltd.
    Inventors: Hideaki Takemori, Hisashi Aoki, Toru Itagaki
  • Publication number: 20200043844
    Abstract: A single crystal silicon carbide substrate includes a substrate of a single crystal silicon carbide; a first wiring film and a second wiring film disposed on one side of the substrate and having therebetween an interstice which is formed continuously without being broken from a first end of the one side to a second end of the one side; and an insulating portion disposed in the interstice between the first wiring film and the second wiring film and including a surface texture of the one side exposed by removing using dry etching a surface contaminated layer which is contaminated by at least one of iron, aluminum, chromium, or nickel adhered thereto.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 6, 2020
    Inventors: Hideaki TAKEMORI, Hisashi AOKI, Toru ITAGAKI
  • Publication number: 20200029441
    Abstract: The object of the invention is to provide a double-sided circuit non-oxide-based ceramic substrate excellent in radiation property and low in cost, and a method for manufacturing the same. A double-sided circuit non-oxide-based ceramic substrate related to the present invention includes a high heat-conductive non-oxide-based ceramic substrate that includes a through hole, a holding layer that is formed on a wall surface of the through hole, and an electro-conductive metal section that is held inside the through hole by the holding layer and does not include an active metal. The double-sided circuit non-oxide-based ceramic substrate related to the present invention preferably includes electrodes (thin film electrodes) that shield end surfaces of the holding layer and end surfaces of the electro-conductive metal section which are exposed to front and back surfaces of the ceramic substrate.
    Type: Application
    Filed: July 3, 2019
    Publication date: January 23, 2020
    Inventors: Hideaki TAKEMORI, Satoshi HIGASHIYAMA, Toru ITAGAKI
  • Patent number: 8269301
    Abstract: Submounts for mounting optical devices which have an excellent heat radiating property and can be formed in a wafer state in batch are provided. A metallized electrode including optical device mounting parts and wiring parts is formed on a surface of a first substrate containing an insulating material as a main component, a through hole is formed in a glass substrate serving as a second substrate, the optical device mounting parts of the first substrate are aligned to be located inside the through hole of the second substrate, and the first substrate and the second substrate are joined together by use of a method such as anodic bonding.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: September 18, 2012
    Assignee: Hitachi Kyowa Engineering Co., Ltd.
    Inventors: Shohei Hata, Eiji Sakamoto, Naoki Matsushima, Hideaki Takemori, Masatoshi Seki
  • Patent number: 8008675
    Abstract: The optical mounting package of the present invention is featured by mounting a silicon frame on an insulating substrate for mounting the optical element. The package of the present invention is also featured by that the frame mounted on the insulating substrate for mounting the optical element is made of silicon. A method of manufacturing the package of the present invention is featured by mounting the silicon wafer on the insulating substrate.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: August 30, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Takemori, Satoshi Higashiyama, Kazuhiro Hirose
  • Publication number: 20090294158
    Abstract: To provide an electronic circuit board in which a conductive wire is excellently connected to a bonding pad formed directly on a polyimide film. The electronic circuit includes: a first layer metal pattern 3 formed on a substrate 1; a polyimide film 2 formed on the first layer metal pattern 3; and a second layer metal pattern formed on a surface of the polyimide film 2. A conductive bump 4 is formed on the surface of the second layer metal pattern 31 by ball-bonding to provide electrical connection with a semiconductor chip 7 bonded to the first layer metal pattern by die-bonding. The conductive bump 4 is electrically connected to an electrode 72 of the semiconductor chip 7 by wire bonding.
    Type: Application
    Filed: March 9, 2006
    Publication date: December 3, 2009
    Inventors: Naoki Matsushima, Hideaki Takemori
  • Publication number: 20090219728
    Abstract: Submounts for mounting optical devices which have an excellent heat radiating property and can be formed in a wafer state in batch are provided. A metallized electrode including optical device mounting parts and wiring parts is formed on a surface of a first substrate containing an insulating material as a main component, a through hole is formed in a glass substrate serving as a second substrate, the optical device mounting parts of the first substrate are aligned to be located inside the through hole of the second substrate, and the first substrate and the second substrate are joined together by use of a method such as anodic bonding.
    Type: Application
    Filed: April 4, 2007
    Publication date: September 3, 2009
    Applicants: Institut Francias Du Petrole, Institut National De La Recherche Agronomique
    Inventors: Shohei Hata, Eiji Sakamoto, Naoki Matsushima, Hideaki Takemori, Masatoshi Seki
  • Patent number: 7525124
    Abstract: A submount for a light emitting diode and its manufacturing method, the submount including a reflector and having a compact size. The submount for the light emitting diode comprises a Si base substrate having input/output terminals formed on a front side thereof, and a Si reflector having a sloped through hole and a reflecting film formed at least on a slope defining the through hole. The Si reflector is mounted on the Si base substrate and is fixedly joined to the Si base substrate. The Si reflector and the Si base substrate are joined to each other by a thin film solder.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: April 28, 2009
    Assignees: Hitachi Kyowa Engineering Co., Ltd., Toyoda Gosei Co., Ltd.
    Inventors: Hideaki Takemori, Satoshi Higashiyama, Kenji Mori, Ryoichi Tohmon, Minoru Hirose, Hiroaki Kawaguchi
  • Patent number: 7476977
    Abstract: A chip mounting substrate for bonding a semiconductor chip to a substrate, comprises a solder layer on the substrate, the solder layer being connectable to a semiconductor chip, wherein the solder layer comprises a layer including ?-phase crystal grains of an Au—Sn alloy at a surface of the solder layer. The solder layer comprising a layer including ?-phase crystal grains of an Au—Sn alloy is formed at a surface of the solder layer. On mounting a semiconductor chip on the substrate, the substrate and the solder layer are heated and an image of the solder layer is shot to perform an image evaluation to detect the timing of mounting the semiconductor chip on the solder layer of the substrate and a position of the chip.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: January 13, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Takeru Fujinaga, Kazuhiro Hirose, Hideaki Takemori, Toshiaki Koizumi
  • Patent number: 7452798
    Abstract: A chip mounting substrate for bonding a semiconductor chip to a substrate, comprises a solder layer on the substrate, the solder layer being connectable to a semiconductor chip, wherein the solder layer comprises a layer including ?-phase crystal grains of an Au—Sn alloy at a surface of the solder layer. The solder layer comprising a layer including ?-phase crystal grains of an Au—Sn alloy is formed at a surface of the solder layer. On mounting a semiconductor chip on the substrate, the substrate and the solder layer are heated and an image of the solder layer is shot to perform an image evaluation to detect the timing of mounting the semiconductor chip on the solder layer of the substrate and a position of the chip.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: November 18, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Takeru Fujinaga, Kazuhiro Hirose, Hideaki Takemori, Toshiaki Koizumi
  • Publication number: 20070207557
    Abstract: A chip mounting substrate for bonding a semiconductor chip to a substrate, comprises a solder layer on the substrate, the solder layer being connectable to a semiconductor chip, wherein the solder layer comprises a layer including ?-phase crystal grains of an Au—Sn alloy at a surface of the solder layer. The solder layer comprising a layer including ?-phase crystal grains of an Au—Sn alloy is formed at a surface of the solder layer. On mounting a semiconductor chip on the substrate, the substrate and the solder layer are heated and an image of the solder layer is shot to perform an image evaluation to detect the timing of mounting the semiconductor chip on the solder layer of the substrate and a position of the chip.
    Type: Application
    Filed: May 11, 2007
    Publication date: September 6, 2007
    Applicant: HITACHI, LTD.
    Inventors: Takeru FUJINAGA, Kazuhiro HIROSE, Hideaki TAKEMORI, Toshiaki KOIZUMI
  • Publication number: 20070170453
    Abstract: The optical mounting package of the present invention is featured by mounting a silicon frame on an insulating substrate for mounting the optical element. The package of the present invention is also featured by that the frame mounted on the insulating substrate for mounting the optical element is made of silicon. A method of manufacturing the package of the present invention is featured by mounting the silicon wafer on the insulating substrate.
    Type: Application
    Filed: April 2, 2007
    Publication date: July 26, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Hideaki Takemori, Satoshi Higashiyama, Kazuhiro Hirose
  • Publication number: 20060054910
    Abstract: A submount for a light emitting diode and its manufacturing method, the submount including a reflector and having a compact size. The submount for the light emitting diode comprises a Si base substrate having input/output terminals formed on a front side thereof, and a Si reflector having a sloped through hole and a reflecting film formed at least on a slope defining the through hole. The Si reflector is mounted on the Si base substrate and is fixedly joined to the Si base substrate. The Si reflector and the Si base substrate are joined to each other by a thin film solder.
    Type: Application
    Filed: September 9, 2005
    Publication date: March 16, 2006
    Inventors: Hideaki Takemori, Satoshi Higashiyama, Kenji Mori, Ryoichi Tohmon, Minoru Hirose, Hiroaki Kawaguchi
  • Publication number: 20050212140
    Abstract: A chip mounting substrate for bonding a semiconductor chip to a substrate, comprises a solder layer on the substrate, the solder layer being connectable to a semiconductor chip, wherein the solder layer comprises a layer including ?-phase crystal grains of an Au—Sn alloy at a surface of the solder layer. The solder layer comprising a layer including ?-phase crystal grains of an Au—Sn alloy is formed at a surface of the solder layer. On mounting a semiconductor chip on the substrate, the substrate and the solder layer are heated and an image of the solder layer is shot to perform an image evaluation to detect the timing of mounting the semiconductor chip on the solder layer of the substrate and a position of the chip.
    Type: Application
    Filed: February 14, 2005
    Publication date: September 29, 2005
    Inventors: Takeru Fujinaga, Kazuhiro Hirose, Hideaki Takemori, Toshiaki Koizumi
  • Patent number: 6934448
    Abstract: An optical element-mounting substrate that makes it easy to optically couple the optical semiconductor element to the optical fiber or to the lens and that can be highly integrated while suppressing deterioration in the high-frequency signals. The optical element-mounting substrate for optically coupling the optical semiconductor element to the optical fiber through the lens, comprises an insulating film formed on the surface of the optical element-mounting substrate, grooves formed on the substrate for installing the optical fiber and the lens, a thin-film electrode formed on the insulating film, a thin-film capacitor and a thin-film temperature sensor arranged maintaining a distance from the thin-film electrode, and a solder film formed on the insulating film in a region where the optical semiconductor element is mounted so as to be electrically connected to the thin-film electrode.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: August 23, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Teruhisa Akashi, Yoshishige Endou, Hideaki Takemori, Masatoshi Seki, Kazuhiro Hirose, Satoshi Higashiyama
  • Publication number: 20050132747
    Abstract: The optical mounting package of the present invention is featured by mounting a silicon frame on an insulating substrate for mounting the optical element. The package of the present invention is also featured by that the frame mounted on the insulating substrate for mounting the optical element is made of silicon. A method of manufacturing the package of the present invention is featured by mounting the silicon wafer on the insulating substrate.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 23, 2005
    Inventors: Hideaki Takemori, Satoshi Higashiyama, Kazuhiro Hirose
  • Publication number: 20050084201
    Abstract: An optical bench for mounting an optical element includes a silicon substrate, a first dielectric substrate and a second dielectric substrate which are arranged on the silicon substrate, on the first substrate, there are arranged mounting sections of a laser diode, a wiring, and a mounting section of the photodiode, and on the silicon substrate, there is arranged a mounting section of a lens or an optical fiber, obtaining an optical bench, which is not easily curved with temperature, for mounting an optical element.
    Type: Application
    Filed: June 29, 2004
    Publication date: April 21, 2005
    Applicant: Hitachi, Ltd.
    Inventors: Teruhisa Akashi, Satoshi Higashiyama, Hideaki Takemori, Kazuhiro Hirose