Abstract: A buffer circuit for reducing leakage current and for protecting circuits from electrostatic discharge (“ESD”). A power supply circuit of an input/output buffer includes a transistor circuit connected to a high-potential power supply, a transistor circuit connected to a low-potential power supply, and a protection circuit connected between the two transistor circuits. The on-resistance of the transistor circuit is small. The transistor circuit generates a reference voltage close to the voltage of the high-potential power supply. The gate and source of the transistor circuits are connected to each other. This significantly reduces leakage current flowing from the reference voltage to the low-potential power supply. The protection circuit has resistance that lowers voltage at a high voltage terminal of the second transistor and reduces current flowing to the second transistor when a great amount of current flows through the first transistor circuit due to the occurrence of ESD.

Abstract: An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.

Abstract: A buffer circuit for reducing leakage current and for protecting circuits from electrostatic discharge (“ESD”). A power supply circuit of an input/output buffer includes a transistor circuit connected to a high-potential power supply, a transistor circuit connected to a low-potential power supply, and a protection circuit connected between the two transistor circuits. The on-resistance of the transistor circuit is small. The transistor circuit generates a reference voltage close to the voltage of the high-potential power supply. The gate and source of the transistor circuits are connected to each other. This significantly reduces leakage current flowing from the reference voltage to the low-potential power supply. The protection circuit has resistance that lowers voltage at a high voltage terminal of the second transistor and reduces current flowing to the second transistor when a great amount of current flows through the first transistor circuit due to the occurrence of ESD.

Abstract: A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

Abstract: An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.

Abstract: An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.

Abstract: A data recording apparatus that accurately records constant linear velocity (CLV) or zone constant linear velocity (ZCLV) data on a recording medium while rotating the recording medium based on the CAV method. A data recording apparatus supplies data recorded on a recording medium, which is rotated by a motor, to a pickup device. The pickup device generates position information indicating the position of the pickup device with respect to the recording medium. The apparatus includes a recording control circuit that controls the motor such that the recording medium is rotated in a manner compliant with a constant angular velocity (CAV) method and controls an output rate of the data supplied to the pickup device based on the position information such that the data is recorded on the recording medium in a manner compliant with a CLV or a ZCLV method.

Abstract: An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit has a protection circuit including a plurality of MOS transistors for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.

Abstract: A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

Abstract: A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

Abstract: A charge pump circuit which may be used in a PLL includes a charge/discharge circuit, a detection circuit and an adjusting circuit. The charge/discharge circuit performs a charge operation in response to a first pulse signal and a discharge operation in response to a second pulse signal and outputs an output signal having a voltage based on the charge and the discharge operations. The detection circuit detects whether a charge operation or a discharge operation was performed and generates a control signal. The adjusting circuit adjusts the charge and discharge operations so that a charge amount and a discharge amount per unit time become substantially equal to each other.

Abstract: A phase comparator apparatus compares a first input signal and a second input signal to output first or second compare output signal. The apparatus includes a detector circuit and a compare output generator circuit. The detector circuit detects the phase difference between the first and second signals to output a detection signal. The compare output generator circuit determines the phase deviation between the first and second input signals using the detection signal and the second input signal. The compare output generator circuit outputs the first compare output signal when the second input signal lags behind the first input signal and outputs the second compare output signal when the second input signal leads the first input signal.

Abstract: An apparatus for demodulating a data signal read from a recording medium, in which data is recorded on at least a portion of the recording medium. The data is recorded using a recording system having a substantially constant linear velocity. In this manner, the recording medium is rotated at a substantially constant speed during the reading of data signals such that one of a frequency and an amplitude of the read data signal varies. The apparatus includes a signal processor for processing the read data signal in response to a change in one of the frequency and amplitude to produce a processed data signal suitable for demodulation. Once the processed data signal is produced, a demodulator operates to demodulate the data signal and to produce a demodulated data signal.