Patents by Inventor Hideaki Zama

Hideaki Zama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11411120
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer including an oxide semiconductor as a main component and forming an insulator layer on a surface of the semiconductor layer. The insulator layer includes silicon oside as a main component and has a hydrogen atom concentration that is less than or equal to 1×1021 atoms/cm3.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: August 9, 2022
    Assignee: ULVAC, INC.
    Inventors: Tadamasa Kobayashi, Hideaki Zama
  • Publication number: 20210222298
    Abstract: A plasma CVD device (10) includes a vacuum container (21) including a space accommodating a film formation subject (S), a storage (30) storing hydrogen-free isocyanate silane and heating the isocyanate silane to generate an isocyanate silane gas supplied to the vacuum container (21), a pipe (11) connecting the storage (30) to the vacuum container (21) to supply the isocyanate silane gas generated by the storage (30) to the vacuum container (21), a temperature adjuster (12) adjusting a temperature of the pipe (11) to 83° C. or higher and 180° C. or lower, an electrode (22) disposed in the vacuum container (21), and a power supply (23) supplying high-frequency power to the electrode (22). When a silicon oxide film is formed on the film formation subject (S) in the vacuum container (21), pressure of the vacuum container (21) is greater than or equal to 50 Pa and less than 500 Pa.
    Type: Application
    Filed: February 13, 2020
    Publication date: July 22, 2021
    Inventors: Tadamasa KOBAYASHI, Hideaki ZAMA
  • Publication number: 20200127136
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer including an oxide semiconductor as a main component and forming an insulator layer on a surface of the semiconductor layer. The insulator layer includes silicon oside as a main component and has a hydrogen atom concentration that is less than or equal to 1×1021 atoms/cm3.
    Type: Application
    Filed: August 17, 2018
    Publication date: April 23, 2020
    Inventors: Tadamasa Kobayashi, Hideaki Zama
  • Patent number: 9851453
    Abstract: A radiological image conversion panel, having a phosphor layer containing therein a fluorescent substance which emits light through radiation exposure, is manufactured by forming the fluorescent substance into respective columnar structures on one of surfaces of a substrate to thereby obtain a phosphor layer made up of a group of columnar structures. The panel is subsequently manufactured by forming reflection films by respectively covering an outer surface of each of the columnar structures with a reflection film while leaving a gap between respective adjoining columnar structures, the reflection film being arranged to reflect light of a predetermined wavelength. In case a refractive index of the gap is lower than a refractive index of the columnar structures, the reflection films are formed of an inorganic material having a higher refractive index than the refractive index of the columnar structures.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: December 26, 2017
    Assignee: ULVAC, INC.
    Inventors: Kazuhiro Honda, Shuji Osono, Hideaki Zama
  • Publication number: 20130113034
    Abstract: A non-volatile semiconductor memory device comprises a tunnel insulating film on a semiconductor substrate, a charge storage film on the tunnel insulating film, a blocking insulating film on the charge storage film, a control gate electrode arranged on the blocking insulating film, and source/drain regions formed on the semiconductor substrate on the both sides of the control gate electrode, that the charge storage film is a silicon nitride film produced according to the catalytic chemical vapor deposition technique and that the ratio between the constituent elements: N/Si falls within the range of from 1.2 to 1.4.
    Type: Application
    Filed: July 28, 2011
    Publication date: May 9, 2013
    Applicants: ULVAC, INC., TOKAI UNIVERSITY EDUCATIONAL SYSTEM
    Inventors: Hideaki Zama, Makiko Takagi, Kiyoteru Kobayashi, Hiroaki Watanabe, Yu Takahara
  • Patent number: 8183153
    Abstract: Disclosed is a method for manufacturing a semiconductor device which is decreased in resistance of a copper wiring containing a ruthenium-containing film and a copper-containing film, thereby having improved reliability. Also disclosed is an apparatus for manufacturing a semiconductor device. Specifically, an Ru film is formed on a substrate having a recessed portion by a CVD method using a raw material containing an organic ruthenium complex represented by the general formula and a reducing gas (step S12). Then, a Cu film is formed on the Ru film by a CVD method using a raw material containing an organic copper complex represented by the general formula and a reducing gas, thereby forming a copper wiring containing the Ru film and the Cu film in the recessed portion (step S14).
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: May 22, 2012
    Assignee: Ulvac, Inc.
    Inventors: Hideaki Zama, Michio Ishikawa, Takumi Kadota, Chihiro Hasegawa
  • Patent number: 8034403
    Abstract: A method of forming a primary coat, which consists of a V- or Ti-containing film, formed on the surface of a subject on which holes or the like have been formed, according to the CVD technique, while using, for instance, a tetravalent amide-type vanadium-containing organometal compound as a raw gas and using, for instance, tertiary butyl hydrazine as a reducing gas, and a copper-containing film is then formed on the primary coat, according to the CVD technique, to thus fill the holes or the like with the copper-containing film and to thus form copper distributing wire, which is excellent in the hole-filling properties and excellent in the adhesion to a primary coat, this process can be applied to the field of copper distributing wires used in the semiconductor industries.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: October 11, 2011
    Assignee: Ulvac, Inc.
    Inventors: Mikio Watanabe, Hideaki Zama
  • Publication number: 20100317189
    Abstract: Disclosed is a method for manufacturing a semiconductor device which is decreased in resistance of a copper wiring containing a ruthenium-containing film and a copper-containing film, thereby having improved reliability. Also disclosed is an apparatus for manufacturing a semiconductor device. Specifically, an Ru film is formed on a substrate having a recessed portion by a CVD method using a raw material containing an organic ruthenium complex represented by the general formula and a reducing gas (step S12). Then, a Cu film is formed on the Ru film by a CVD method using a raw material containing an organic copper complex represented by the general formula and a reducing gas, thereby forming a copper wiring containing the Ru film and the Cu film in the recessed portion (step S14).
    Type: Application
    Filed: September 3, 2008
    Publication date: December 16, 2010
    Applicant: ULVAC, INC.
    Inventors: Hideaki Zama, Michio Ishikawa, Takumi Kadota, Chihiro Hasegawa
  • Publication number: 20100291290
    Abstract: A primary coat, which consists of a V- or Ti-containing film, is formed on the surface of a subject on which holes or the like have been formed, according to the CVD technique, while using, for instance, a tetravalent amide-type vanadium-containing organometal compound as a raw gas and using, for instance, tertiary butyl hydrazine as a reducing gas, and a copper-containing film is then formed on the primary coat, according to the CVD technique, to thus fill the holes or the like with the copper-containing film and to thus form copper distributing wire, which is excellent in the hole-filling properties and excellent in the adhesion to a primary coat, this process can be applied to the field of copper distributing wires used in the semiconductor industries.
    Type: Application
    Filed: September 12, 2005
    Publication date: November 18, 2010
    Inventors: Mikio Watanabe, Hideaki Zama
  • Publication number: 20090098290
    Abstract: Object: The present invention provides a method for forming a copper-containing film having a low resistance at a low temperature, according to the CVD technique.
    Type: Application
    Filed: September 27, 2005
    Publication date: April 16, 2009
    Inventors: Mikio Watanabe, Hideaki Zama
  • Patent number: 6163713
    Abstract: In a high frequency transmission line having a dielectric substrate and a conductor line which is provided on the dielectric substrate for allowing electric current to flow therethrough, the conductor line has a non-grain-boundary oxide superconductor layer with twin walls but without grain boundaries. The high frequency transmission line is in the form of a plane circuit. It is preferable that an oriented oxide superconductor layer is provided between the dielectric substrate and the non-grain-boundary oxide superconductor layer.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: December 19, 2000
    Assignees: NEC Corporation, Sumitomo Electric Industries, Ltd., International Superconductivity Technology Center
    Inventors: Katsumi Suzuki, Sadahiko Miura, Takayuki Inoue, Koji Muranaka, Hideaki Zama, Youichi Enomoto, Tadataka Morishita, Shoji Tanaka