Abstract: A multilayer capacitor includes a pair of external electrodes each having an end face portion; a first principal face extending portion; a second principal face extending portion; a first side face extending portion; and a second side face extending portion. The pair of external electrodes each includes a base electrode and a metallic layer. The metallic layer includes a first metallic layer and a second metallic layer located outside the first metallic layer. An intermetallic compound layer is located outside the first metallic layer, and is exposed from the second metallic layer in a ridge portion lying between the end face portion and the first principal face extending portion, a ridge portion lying between the first side face extending portion and the first principal face extending portion, and a ridge portion lying between the second side face extending portion and the first principal face extending portion.

Abstract: A multilayer capacitor includes a first grounding internal electrode including a first grounding electrode having a lead-out part led to one side surface of a stacked body, and a second grounding electrode having a lead-out part led to the other side surface; a second grounding internal electrode including a third grounding electrode which overlaps the first grounding electrode and has a lead-out part led to the other side surface, and a fourth grounding electrode which overlaps the second grounding electrode and has a lead-out part led to one side surface; and a signal internal electrode disposed between the first and second grounding internal electrodes, wherein the first and second grounding electrodes and the third and fourth grounding electrodes have, at their adjacent opposed sides, corners curved as seen in a plan view in the stacking direction, respectively, the corners being each located opposite to the corresponding lead-out part.

Abstract: A multilayer capacitor includes a pair of external electrodes each having an end face portion; a first principal face extending portion; a second principal face extending portion; a first side face extending portion; and a second side face extending portion. The pair of external electrodes each includes a base electrode and a metallic layer. The metallic layer includes a first metallic layer and a second metallic layer located outside the first metallic layer. An intermetallic compound layer is located outside the first metallic layer, and is exposed from the second metallic layer in a ridge portion lying between the end face portion and the first principal face extending portion, a ridge portion lying between the first side face extending portion and the first principal face extending portion, and a ridge portion lying between the second side face extending portion and the first principal face extending portion.

Abstract: A multilayer capacitor includes a first grounding internal electrode including a first grounding electrode having a lead-out part led to one side surface of a stacked body, and a second grounding electrode having a lead-out part led to the other side surface; a second grounding internal electrode including a third grounding electrode which overlaps the first grounding electrode and has a lead-out part led to the other side surface, and a fourth grounding electrode which overlaps the second grounding electrode and has a lead-out part led to one side surface; and a signal internal electrode disposed between the first and second grounding internal electrodes, wherein the first and second grounding electrodes and the third and fourth grounding electrodes have, at their adjacent opposed sides, corners curved as seen in a plan view in the stacking direction, respectively, the corners being each located opposite to the corresponding lead-out part.

Abstract: An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided.

Abstract: An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided.

Abstract: An electronic component 3 with a shielding function whose upper surface is held at a reference potential, an electronic component 13, and a semiconductor component 4 are mounted on a wiring board 2, and are covered with an insulating resin portion 5 while a conductive layer 6 is formed on an upper surface of the insulating resin portion 5. The conductive layer 6 is held at the reference potential by being connected to a portion, which is held at the reference potential, of the electronic component 3 with a shielding function exposed from the insulating resin portion 5. There can be provided a small-sized circuit module superior in an electromagnetic shielding function.

Abstract: An electronic component module comprises a circuit board having a cavity in one principal surface thereof. The electronic component module also comprises a first semiconductor device accommodated within the cavity and a second semiconductor device disposed on the one principal surface of the circuit board so as to cover the first semiconductor device in plan view. The electronic component module further comprises a resin material disposed to cover at least a side surface of the second semiconductor device.

Abstract: A sensor module includes a substrate having a cavity in a surface thereof; a first sensor inside the cavity; a second sensor inside the cavity; and a lid body sealing the cavity and including an internal surface. The second sensor includes a first electrode located on an internal surface of the lid body and a second electrode located in the cavity.

Abstract: An IC element 2 having an oscillation circuit and an amplification circuit is mounted on a wiring board 1, the IC element 2 is covered with a sealing resin layer 4 having a window 4a on an upper surface of the IC element 2, and a shielding layer 5 is made to adhere to the sealing resin layer 4 and the window 4a from above. In a simple configuration, the entrance of electromagnetic waves into the IC element 2 is reduced, which allows a transmission signal from the IC element 2 to be stabilized.

Abstract: A sensor module includes a substrate having a cavity in a surface thereof; a first sensor inside the cavity; a second sensor inside the cavity; and a lid body sealing the cavity and including an internal surface. The second sensor includes a first electrode located on an internal surface of the lid body and a second electrode located in the cavity.

Abstract: An electronic component 3 with a shielding function whose upper surface is held at a reference potential, an electronic component 13, and a semiconductor component 4 are mounted on a wiring board 2, and are covered with an insulating resin portion 5 while a conductive layer 6 is formed on an upper surface of the insulating resin portion 5. The conductive layer 6 is held at the reference potential by being connected to a portion, which is held at the reference potential, of the electronic component 3 with a shielding function exposed from the insulating resin portion 5. There can be provided a small-sized circuit module superior in an electromagnetic shielding function.

Abstract: An electronic component module comprises a circuit board having a cavity in one principal surface thereof. The electronic component module also comprises a first semiconductor device accommodated within the cavity and a second semiconductor device disposed on the one principal surface of the circuit board so as to cover the first semiconductor device in plan view. The electronic component module further comprises a resin material disposed to cover at least a side surface of the second semiconductor device.

Abstract: An IC element 2 having an oscillation circuit and an amplification circuit is mounted on a wiring board 1, the IC element 2 is covered with a sealing resin layer 4 having a window 4a on an upper surface of the IC element 2, and a shielding layer 5 is made to adhere to the sealing resin layer 4 and the window 4a from above. In a simple configuration, the entrance of electromagnetic waves into the IC element 2 is reduced, which allows a transmission signal from the IC element 2 to be stabilized.

Abstract: A method for manufacturing a piezoelectric oscillator. The method having the step of preparing a master substrate partitioned into plural substrate regions. Mounting on each of the substrate regions a piezoelectric vibrator and an IC for controlling an oscillation output of the piezoelectric vibrator. The master substrate is then divided into individual substrate regions by cutting the master substrate on the outside circumferences of the individual substrate regions, thereby obtaining a plurality of piezoelectric oscillators.

Abstract: An inventive temperature-compensated crystal oscillator has a construction such that a crystal oscillator element (5) is accommodated in a container (1) and an IC element (7) for controlling an oscillation output on the basis of the oscillation of the crystal oscillator element (5) is mounted on a lower surface of the container (1). A plurality of electrode pads (10) at least including plural crystal electrode pads connected to the crystal oscillator element (5), plural writing control electrode pads, and an oscillation output electrode pad, a ground electrode pad, a power source voltage electrode pad and an oscillation control electrode pad connected to surface mounting external terminals are arranged in a matrix configuration of m rows×n columns (wherein m and n are natural numbers not smaller than 2) in an IC element mounting area. The IC element (7) is electrically connected to the electrode pads (10).

Abstract: An inventive temperature-compensated crystal oscillator has a construction such that a crystal oscillator element (5) is accommodated in a container (1) and an IC element (7) for controlling an oscillation output on the basis of the oscillation of the crystal oscillator element (5) is mounted on a lower surface of the container (1). A plurality of electrode pads (10) at least including plural crystal electrode pads connected to the crystal oscillator element (5), plural writing control electrode pads, and an oscillation output electrode pad, a ground electrode pad, a power source voltage electrode pad and an oscillation control electrode pad connected to surface mounting external terminals are arranged in a matrix configuration of m rows×n columns (wherein m and n are natural numbers not smaller than 2) in an IC element mounting area. The IC element (7) is electrically connected to the electrode pads (10).

Abstract: A master substrate 15 is prepared which is partitioned into plural substrate regions A, formed with a window 16 in each of the substrate regions A, and provided with a throw-away region B between a respective pair of adjoining substrate regions A, the throw-away region including a write control terminal 12. A package 1 including a recess 11 is loaded from one side of the master substrate so as to be mounted on the substrate region A in a manner to close the window 16. A quartz-crystal oscillator device 5 is accommodated in the recess 11 of each package 1, while an aperture of the recess 11 is sealed with a closure 4. An IC 6 is inserted through the window 16 from the other side of the master substrate 15 so as to be mounted to a lower side of the package 1. Temperature compensation data for the quartz-crystal oscillator device 5 are written to a memory in the IC 6 via the write control terminal 12.

Abstract: An inventive temperature-compensated crystal oscillator has a construction such that a crystal oscillator element (5) is accommodated in a container (1) and an IC element (7) for controlling an oscillation output on the basis of the oscillation of the crystal oscillator element (5) is mounted on a lower surface of the container (1). A plurality of electrode pads (10) at least including plural crystal electrode pads connected to the crystal oscillator element (5), plural writing control electrode pads, and an oscillation output electrode pad, a ground electrode pad, a power source voltage electrode pad and an oscillation control electrode pad connected to surface mounting external terminals are arranged in a matrix configuration of m rows×n columns (wherein m and n are natural numbers not smaller than 2) in an IC element mounting area. The IC element (7) is electrically connected to the electrode pads (10).

Abstract: An inventive temperature-compensated crystal oscillator has a construction such that a crystal oscillator element (5) is accommodated in a container (1) and an IC element (7) for controlling an oscillation output on the basis of the oscillation of the crystal oscillator element (5) is mounted on a lower surface of the container (1). A plurality of electrode pads (10) at least including plural crystal electrode pads connected to the crystal oscillator element (5), plural writing control electrode pads, and an oscillation output electrode pad, a ground electrode pad, a power source voltage electrode pad and an oscillation control electrode pad connected to surface mounting external terminals are arranged in a matrix configuration of m rows×n columns (wherein m and n are natural numbers not smaller than 2) in an IC element mounting area. The IC element (7) is electrically connected to the electrode pads (10).