Patents by Inventor Hidefumi Ito

Hidefumi Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240140804
    Abstract: A graphene nanoribbon represented by formula (1): wherein R1 represents a linear alkyl group having 1 to 12 carbon atoms, R3 and R4 are both hydrogen atoms, or R3 and R4 taken together form a group represented by —SiR2aR2b—, wherein R2a and R2b are the same or different, and each represents a hydrogen atom, an optionally branched alkyl group having 1 to 4 carbon atoms, or a phenyl group, and n represents an integer of 1 or more, is a novel GNR obtained by a simpler and industrially advantageous method for GNRs.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 2, 2024
    Applicants: National University Corporation Tokai National Higher Education and Research System, TAOKA CHEMICAL CO., LTD.
    Inventors: Kenichiro ITAMI, Hideto ITO, Kaho MATSUSHIMA, Hidefumi NAKATSUJI, Ryoma UENO, Shunsuke ISHIDA, Sachie OKUDA
  • Publication number: 20130151208
    Abstract: An information processing apparatus comprises an acquisition unit configured to acquire three-dimensional models representing a maxillary and mandibular of a patient. The information processing apparatus further comprises a derivation unit configured to derive an excursive movement between the three-dimensional model representing the maxillary that is acquired by the acquisition unit, and the three-dimensional model representing the mandibular that is acquired by the acquisition unit. The derivation unit is further configured to derive the excursive movement posterior to an intercuspal position.
    Type: Application
    Filed: February 8, 2013
    Publication date: June 13, 2013
    Inventor: Hidefumi ITO
  • Patent number: 7212584
    Abstract: A distortion compensator compensates for distortion arising in an amplifier that amplifies a signal with improved efficiency. The distortion compensator includes a signal level detector which detects the level of a signal to be amplified by an amplifier, a distortion compensation execution unit which executes distortion compensation on the signal to be amplified according to a mode of distortion compensation corresponding to the signal level detected by the signal level and a correspondence between signal levels and distortion compensation control values as pairs, a distortion compensation control value correspondence updater which updates the correspondence between the signal levels and the distortion compensation control values used in the execution of distortion compensation, and a distortion compensation control value number controller which controls the values of stipulated parameters.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: May 1, 2007
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naoki Hongo, Masaki Suto, Toshio Takada, Hidefumi Ito, Shuhei Miura
  • Publication number: 20040120420
    Abstract: This invention is intended to improve the efficiency of distortion compensation in a distortion compensator that compensates for distortion arising in an amplifier that amplifies a signal. Signal level detection means 1 detects the level of a signal amplified by the amplifier 5. Distortion compensation execution means 2-4 executes distortion compensation with respect to the signal amplified by the amplifier 5 by a mode of distortion compensation corresponding to the signal level detected by the signal level detection means based on a correspondence between signal levels and distortion compensation control values that determines the mode of distortion compensation. Distortion compensation control value correspondence update means 6 updates the correspondence between signal levels and distortion compensation control values used in the execution of distortion compensation by the distortion compensation execution means based on the signal amplified by the amplifier.
    Type: Application
    Filed: July 23, 2003
    Publication date: June 24, 2004
    Inventors: Naoki Hongo, Masaki Suto, Toshio Takada, Hidefumi Ito, Shuhei Miura
  • Patent number: 6731919
    Abstract: Disclosed is an amplifier apparatus that corrects mismatching of the filter transmission characteristic due to a change in the temperature of the amplifier apparatus itself and thereby stably amplifies the high-frequency signal. The amplifier apparatus converts a signal to be processed into one having an intermediate frequency band to thereby execute amplification processing.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: May 4, 2004
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Uchida, Masaki Suto, Shoji Fujimoto, Junetsu Urata, Hidefumi Ito
  • Publication number: 20020022464
    Abstract: Disclosed is an amplifier apparatus that corrects mismatching of the filter transmission characteristic due to a change in the temperature of the amplifier apparatus itself and thereby stably amplifies the high-frequency signal. The amplifier apparatus converts a signal to be processed into one having an intermediate frequency band to thereby execute amplification processing.
    Type: Application
    Filed: October 11, 2001
    Publication date: February 21, 2002
    Inventors: Takashi Uchida, Masaki Suto, Shoji Fujimoto, Junetsu Urata, Hidefumi Ito
  • Patent number: 6271723
    Abstract: A distortion compensating device comprises a 3 dB coupler having four terminals. The first terminal supplies an input signal to be inputted to an amplifier or is supplied with an input signal from an amplifier. The second terminal is associated with a third-order distortion generator for generating a third-order distortion having an amplitude for canceling out a third-order distortion generated by the amplifier depending on the supplied input signal. The third terminal is associated with a phase adjuster for adjusting the phase of the input signal to set the phase difference between the input signal and the third-order distortion generated by the third-order distortion generator to a phase difference for canceling out the third-order distortion generated by the amplifier.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: August 7, 2001
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Terufumi Nagano, Yoichi Okubo, Yasuo Sera, Masaki Suto, Hidefumi Ito
  • Patent number: 6147001
    Abstract: A method of manufacturing a semiconductor integrated circuit wherein a patterned wafer polishing machine for uniformly polishing a surface by chemical mechanical polishing is utilized which is provided with a head for holding a wafer and rubbing it on an abrasive surface. A pressure plate provided with vents is held by the head body which is provided with a gas inlet and an elastic film for sealing vents is provided on the end face on the side reverse to the gas inlet side of the pressure plate. A patterned wafer is held by the head as the wafer, pressed by action of the pressure of air from the gas inlet via the elastic film is pressed mechanically by the pressure plate. The polishing surface which is a principal plane on the patterned side of the wafer is mechanochemically polished by the abrasive surface.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: November 14, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Kimura, Hidefumi Ito, Hiroyuki Kojima, Nobuhiro Konishi, Yuuichirou Taguma, Shinichiro Mitani
  • Patent number: 5706140
    Abstract: An optical distance measuring equipment in which light from a light emission element is transmitted to an object through a light transmission lens, and light reflected on the object is received by a light reception element through a light reception lens so that a distance to the object is measured on the basis of light transmitting timing and light receiving timing. In the optical distance measuring equipment, a lens holding member for disposing the light transmission lens and the light reception lens substantially at the same distance relative to the light emission element and the light reception element respectively is provided in front of a light transmission/reception board on which the light emission element and the light reception element are installed.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: January 6, 1998
    Assignees: Kansei Corp., Kabushiki Kaisha Koden Seisakusho
    Inventors: Jun Nishino, Hiroshi Takeda, Sigeru Ryugo, Hidefumi Ito, Takashi Yoshimura
  • Patent number: 4599576
    Abstract: An insulated gate type field effect transistor for high power which has a low conductivity region surrounding a drain region and an offset gate region having a further lower conductivity adjoined thereto, wherein the length and impurity concentration are designed according to the electric characteristics of the transistor. A combination of P channel and N channel type transistors having substantially the same electric characteristics and an audio amplifying circuit using the combination are also disclosed.
    Type: Grant
    Filed: March 1, 1978
    Date of Patent: July 8, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Isao Yoshida, Takeaki Okabe, Shikayuki Ochi, Hidefumi Ito, Masatomo Furumi, Masaru Takeuchi, Minoru Nagata
  • Patent number: 4213140
    Abstract: An insulated-gate semiconductor device wherein a first region is formed in the surface of a semiconductor substrate, the first region having a conductivity type opposite to that of the substrate, two insulated-gate FET's are formed within the first region, the drain of the first insulated-gate FET and that of the second insulated-gate FET are made common, the drains are electrically connected to the first region, and the gate of the first insulated-gate FET and the source of the second insulated-gate FET, and the gate of the second insulated-gate FET and the source of the first insulated-gate FET are respectively connected, thereby to prevent the occurrence of a negative resistance.
    Type: Grant
    Filed: July 6, 1978
    Date of Patent: July 15, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Takeaki Okabe, Isao Yoshida, Mineo Katsueda, Hidefumi Ito, Masatomo Furumi, Shikayuki Ochi
  • Patent number: 4138367
    Abstract: A catalyst, which consists essentially of a catalytic metal, or metals, of the platinum group distributed on a carrier of active alumina and exhibits high conversion ability for CO and HC and good durability but exhibits a relatively low activity on the oxidation of SO.sub.2, is produced by impregnating the carrier with an aqueous solution containing, dissolved therein, a complex of a salt of EDTA and the catalytic metal and baking the impregnated carrier in a stream of steam at temperatures between 300 and 700.degree. C.
    Type: Grant
    Filed: June 24, 1977
    Date of Patent: February 6, 1979
    Assignee: Nissan Motor Company, Limited
    Inventors: Junichi Mine, Akio Iizuka, Tetsuhiko Yoneshige, Hidefumi Ito