Patents by Inventor Hidefumi Kuroki

Hidefumi Kuroki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electric interpolating apparatus and position information detecting apparatus using such apparatus
    Patent number: 5918202
    Abstract: An interpolating process is performed on an input periodic signal using at least one first circuit board and a second board. Each first circuit board includes a partial circuit for performing the interpolating process. A plurality of these first boards can be mounted on the second board, and a divisional number of the interpolating process can be selected in accordance with the number of first boards mounted on the second board.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: June 29, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hidefumi Kuroki, Satoshi Ishii, Hiroshi Kotake, Shinji Ueda
  • Method of producing semiconductor device
    Patent number: 5270253
    Abstract: A semiconductor device which includes an electrode portion formed on a wafer; a passivation film deposited on said wafer except for said electrode portion; an insulating film deposited only on said passivation film so as to have a predetermined thickness and so as to include a concave portion over said electrode portion; and conductive material embedded in said concave portion at least up to the height of said insulating film, wherein the conductive material is intended to be used for bonding to a substrate.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: December 14, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hajime Arai, Isao Furuta, Hidefumi Kuroki, Junichi Arima, Yoshihiro Hirata, Shigeru Harada
  • Semiconductor device and a method of producing same
    Patent number: 4922321
    Abstract: A semiconductor device which includes an electrode portion formed on a wafer; a passivation film deposited on said wafer except for said electrode portion; an insulating film deposited only on said passivation film so as to have a predetermined thickness anad so as to include a concave portion over said electrode portion; and conductive material embedded in said concave portion at least up to the height of said insulating film, wherein the conductive material is intended to be used for bonding to a substrate.
    Type: Grant
    Filed: January 27, 1987
    Date of Patent: May 1, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hajime Arai, Isao Furuta, Hidefumi Kuroki, Junichi Arima, Yoshihiro Hirata, Shigeru Harada