Patents by Inventor Hidefumi Yoshida

Hidefumi Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190302815
    Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
    Type: Application
    Filed: June 18, 2019
    Publication date: October 3, 2019
    Inventors: Kohei TANAKA, Hidefumi YOSHIDA, Takeshi NOMA, Ryo YONEBAYASHI, Takayuki NISHIYAMA, Mitsuhiro MURATA, Yosuke IWATA
  • Publication number: 20190295482
    Abstract: A liquid crystal display device includes sub-pixel electrodes respectively provided to three sub-pixels, and an interelectrode connection portion that connects sub-pixel electrodes adjacent to each other among the sub-pixel electrodes. The interelectrode connection portion is provided in a position where boundaries of liquid crystal alignment directions of sub-pixels adjacent to each other are connected.
    Type: Application
    Filed: March 19, 2019
    Publication date: September 26, 2019
    Inventors: TAKAHIRO SASAKI, HIDEFUMI YOSHIDA, KAZUTAKA HANAOKA, KIMIAKI NAKAMURA
  • Patent number: 10372009
    Abstract: The optical device (100) includes a first substrate (10), a second substrate (20), and an optical layer (30). The first substrate includes a first electrode (11) and a second electrode (12) configured to be provided with mutually different electrical potentials within a pixel. The optical layer may include a medium (31) and a plurality of shape-anisotropic particles (32) dispersed in the medium. At least one of the first electrode and the second electrode may include a plurality of comb teeth portions (11a, 12a) arranged at predetermined intervals along the first direction (D1). When an electric potential difference is applied between the first electrode and the second electrode, the pixel may be configured to have an electrical field distribution in which a strong electric field region having a stronger field intensity than another region is periodically formed parallel to the surface of the optical layer along a second direction (D2) orthogonal to the first direction.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: August 6, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tomoko Teranishi, Hiroyuki Moriwaki, Eiji Satoh, Tadashi Ohtake, Hidefumi Yoshida, Satoshi Matsumura
  • Patent number: 10365674
    Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: July 30, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kohei Tanaka, Hidefumi Yoshida, Takeshi Noma, Ryo Yonebayashi, Takayuki Nishiyama, Mitsuhiro Murata, Yosuke Iwata
  • Publication number: 20190187522
    Abstract: The liquid crystal display device including: a first substrate; a liquid crystal layer; and a second substrate, the first substrate including a first electrode, and a second electrode, the liquid crystal molecules being aligned in a direction parallel to the first substrate with no voltage applied, the second electrode being provided with openings, the openings each having a long shape with two or more wide portions and one or more narrow portions, the two or more wide portions and the one or more narrow portions in each of the openings alternating with each other in a lengthwise direction of the opening, each of the wide portions of one of adjacent two openings being adjacent to one of the narrow portions of the other of the adjacent two openings, each of the narrow portions of the one opening being adjacent to one of the wide portions of the other opening.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 20, 2019
    Inventors: TAKASHI KATAYAMA, SHINPEI HIGASHIDA, TAKAHIRO SASAKI, KAZUTAKA HANAOKA, KIMIAKI NAKAMURA, HIDEFUMI YOSHIDA, SHINJI SHIMADA
  • Patent number: 10269305
    Abstract: The present invention provides a mirror display that has improved design aesthetics and makes it possible to sufficiently improve visibility in mirror mode in dark environments. The mirror display according to the present invention includes a half mirror plate having a half mirror layer, a display device, a case, and an auxiliary illumination unit that includes an auxiliary light source. The case supports at least the half mirror plate and the display device and includes an outer frame that covers an edge of a front surface of the half mirror plate when viewed in a plan view from a viewing side. The display device is arranged on a rear side of the half mirror plate. The auxiliary light source is arranged on the rear side of the half mirror plate, the display device, or the outer frame. The auxiliary illumination unit is controlled separately from the display device and emits light towards the viewing side when the mirror display is in mirror mode.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: April 23, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Hasegawa, Hiroyuki Hakoi, Akira Sakai, Hidefumi Yoshida, Takaharu Kanai, Takako Shimizu, Yuuki Itou, Atsushi Ogawa, Akira Tsuruta, Takayuki Yuasa, Shigeaki Mizushima
  • Publication number: 20190113811
    Abstract: The present invention provides a horizontal alignment mode liquid crystal display device capable of achieving high resolution, high speed response, and high transmittance. The liquid crystal display device of present invention sequentially includes a first substrate, a liquid crystal layer containing liquid crystal molecules, and a second substrate. The first substrate includes a first electrode, a second electrode provided closer to the liquid crystal layer than the first electrode is, and an insulating film provided between the first electrode and the second electrode. An opening portion (15) is formed in the second electrode in each of a plurality of units of display (50) arrayed in a matrix pattern. The liquid crystal molecules are aligned parallel to the first substrate in a voltage non-applied state in which no voltage is applied between the first electrode and the second electrode.
    Type: Application
    Filed: March 22, 2017
    Publication date: April 18, 2019
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: YOSUKE IWATA, MITSUHIRO MURATA, TAKUMA TOMOTOSHI, HIDEFUMI YOSHIDA
  • Patent number: 10223984
    Abstract: A production control system for liquid crystal panels includes a general design circuit board producing section configured to produce general design circuit boards, a frame processing section configured to process frames of the general design circuit boards based on an outline of the liquid crystal panels in an order from a customer, a customer terminal, a processor, and information and communication lines. At least the outline of the liquid crystal panels and an order quantity are input to the customer terminal by the customer. The processor is configured to control the general design circuit board producing section to produce the general design circuit boards and the frame processing section to process the frames of the general design circuit boards for an order quantity based on the outline of the display panels and the order quantity entered in the customer terminal.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 5, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinya Kadowaki, Hidefumi Yoshida
  • Patent number: 10185172
    Abstract: A method of driving a display device including a display panel that includes a color filter board is provided. The color filter board includes a light blocking section formed in a grid and color sections that are formed in areas surrounded by a pattern of the light blocking section in different colors from area to area. The color sections form display pixels on a combination basis. The display panel includes a light blocking area in at least a section of an edge along an outline of the display panel. The method includes setting the color sections that do not form the display pixels among the color sections adjacent to the light blocking area in a plan view of the display panel constantly in the black state.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: January 22, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinya Kadowaki, Hidefumi Yoshida, Ryuzo Yuki
  • Patent number: 10175542
    Abstract: A liquid crystal display device (100) includes a liquid crystal display panel (1) and an illumination element (2), and is capable of switching between: a first mode of displaying in which displaying is performed by using a plurality of color rays emitted from the illumination element; and a second mode of displaying in which the background is allowed to be perceived, with no color rays being emitted from the illumination element.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: January 8, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takahiro Sasaki, Iori Aoyama, Yuichi Kita, Kazutaka Hanaoka, Hidefumi Yoshida
  • Patent number: 10146086
    Abstract: The present invention provides a mirror display that sufficiently prevents a decrease in the screen luminance in the display mode while sufficiently increasing the reflectance in the mirror mode, and also gives excellent production efficiency.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: December 4, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Akira Sakai, Masahiro Hasegawa, Hiroyuki Hakoi, Hidefumi Yoshida, Shigeaki Mizushima
  • Patent number: 10126859
    Abstract: A touch panel includes: a first substrate; a second substrate disposed on a viewer side of the first substrate; a liquid crystal layer provided between the first substrate and the second substrate; a plurality of pixel electrodes and a common electrode for applying a voltage to the liquid crystal layer; and a plurality of detection electrodes and a plurality of driving electrodes for a touch sensor. The first substrate includes: a first transparent substrate; and the plurality of pixel electrodes, which are formed on the liquid crystal layer side of the first transparent substrate. The second substrate includes: a second transparent substrate; and the plurality of driving electrodes and the plurality of detection electrodes formed on the liquid crystal layer side of the second transparent substrate. The touch panel does not include a conductive layer on the viewer side of the second transparent substrate.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: November 13, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yasuhiro Sugita, Kenshi Tada, Hiroyuki Ogawa, Shinji Yamagishi, Jean Mugiraneza, Koichi Miyachi, Hidefumi Yoshida, Mitsuhiro Murata, Kohhei Tanaka
  • Patent number: 10121429
    Abstract: The present invention addresses the problem of reducing power consumption when switching a gate line between a selected state and a non-selected state, and of providing a narrower frame for an active matrix substrate. A gate driver (11) that scans each gate line is formed inside a display area in an active matrix substrate (20a) having gate lines (13G) and data lines formed therein. The gate driver (11) switches the gate line to either a selected state or a non-selected state, in accordance with a control signal supplied via a line (15L). The gate driver (11) includes a high-charge drive circuit (11a), a low-charge drive circuit (11b), and a shift register (11c). The high-charge drive circuit is supplied with a first DC voltage signal corresponding to the selected state via the line (15L), and charges the gate line to the potential of the first DC voltage signal.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: November 6, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kohhei Tanaka, Hidefumi Yoshida
  • Publication number: 20180239211
    Abstract: The optical device (100) includes a first substrate (10), a second substrate (20), and an optical layer (30). The first substrate includes a first electrode (11) and a second electrode (12) configured to be provided with mutually different electrical potentials within a pixel. The optical layer may include a medium (31) and a plurality of shape-anisotropic particles (32) dispersed in the medium. At least one of the first electrode and the second electrode may include a plurality of comb teeth portions (11a, 12a) arranged at predetermined intervals along the first direction (D1). When an electric potential difference is applied between the first electrode and the second electrode, the pixel may be configured to have an electrical field distribution in which a strong electric field region having a stronger field intensity than another region is periodically formed parallel to the surface of the optical layer along a second direction (D2) orthogonal to the first direction.
    Type: Application
    Filed: August 9, 2016
    Publication date: August 23, 2018
    Inventors: TOMOKO TERANISHI, HIROYUKI MORIWAKI, EIJI SATOH, TADASHI OHTAKE, HIDEFUMI YOSHIDA, SATOSHI MATSUMURA
  • Publication number: 20180158421
    Abstract: A production control system for liquid crystal panels includes a general design circuit board producing section configured to produce general design circuit boards, a frame processing section configured to process frames of the general design circuit boards based on an outline of the liquid crystal panels in an order from a customer, a customer terminal, a processor, and information and communication lines. At least the outline of the liquid crystal panels and an order quantity are input to the customer terminal by the customer. The processor is configured to control the general design circuit board producing section to produce the general design circuit boards and the frame processing section to process the frames of the general design circuit boards for an order quantity based on the outline of the display panels and the order quantity entered in the customer terminal.
    Type: Application
    Filed: May 20, 2016
    Publication date: June 7, 2018
    Inventors: SHINYA KADOWAKI, HIDEFUMI YOSHIDA
  • Publication number: 20180143486
    Abstract: A method of driving a display device including a display panel that includes a color filter board is provided. The color filter board includes a light blocking section formed in a grid and color sections that are formed in areas surrounded by a pattern of the light blocking section in different colors from area to area. The color sections form display pixels on a combination basis. The display panel includes a light blocking area in at least a section of an edge along an outline of the display pane. The method includes setting the color sections that do not form the display pixels among the color sections adjacent to the light blocking area in a plan view of the display panel constantly in the black state.
    Type: Application
    Filed: May 20, 2016
    Publication date: May 24, 2018
    Inventors: Shinya KADOWAKI, Hidefumi YOSHIDA, Ryuzo YUKI
  • Publication number: 20180095311
    Abstract: A liquid crystal display device (100) includes a liquid crystal display panel (1) and an illumination element (2), and is capable of switching between: a first mode of displaying in which displaying is performed by using a plurality of color rays emitted from the illumination element; and a second mode of displaying in which the background is allowed to be perceived, with no color rays being emitted from the illumination element.
    Type: Application
    Filed: April 11, 2016
    Publication date: April 5, 2018
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: TAKAHIRO SASAKI, IORI AOYAMA, YUICHI KITA, KAZUTAKA HANAOKA, HIDEFUMI YOSHIDA
  • Patent number: 9934742
    Abstract: Provided is a display panel that reduces occurrence of display irregularities in a display region even in a case where driving circuits that switch gate lines between selected and non-selected states are provided in the display region. A display panel of the present invention includes an active matrix substrate and a counter substrate, the active matrix substrate being provided with a plurality of gate lines and a plurality of source lines. The active matrix substrate includes, in a display region, a driving circuit provided with respect to each of the gate lines, for switching the gate line between a selected state and a non-selected state.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: April 3, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidefumi Yoshida, Kohhei Tanaka
  • Publication number: 20180011504
    Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
    Type: Application
    Filed: September 21, 2017
    Publication date: January 11, 2018
    Inventors: Kohei TANAKA, Hidefumi YOSHIDA, Takeshi NOMA, Ryo YONEBAYASHI, Takayuki NISHIYAMA, Mitsuhiro MURATA, Yosuke IWATA
  • Patent number: 9853070
    Abstract: A method of manufacturing a display panel substrate having a semiconductor element includes a film forming step of forming a thin film, a resist film forming step of forming a positive resist film on the thin film, a first exposure step of selectively exposing a resist film via a photomask including a pattern of the semiconductor element, a second exposure step of selectively exposing the resist film by scanning and irradiating the resist film with light along an outline shape of the display panel substrate, a developing step of developing the resist film to remove the resist film exposed in the first and second exposure steps and form a resist pattern on the thin film, an etching step of etching the thin film using the resist pattern as a mask, and forming a thin-film pattern by selectively removing the thin film, and a peeling step of peeling the resist pattern.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 26, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinya Kadowaki, Hidefumi Yoshida