Patents by Inventor Hideharu Tezuka

Hideharu Tezuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4831483
    Abstract: To turn off an output transistor and generate an alarm whenever a load driven by the output transistor is shorted or opened, the abnormality detection alarm circuit comprises a short detection circuit; an open detection circuit; a delay circuit; an output transistor driving circuit; and an alarm circuit. The delay circuit generates a delayed abnormality signal after the short or open detection circuit has kept generating an abnormal signal beyond a predetermined time. Further, a latch circuit is incorporated, to automatically returning the output transistor driving circuit and the alarm circuit to the normal status immediately after the abnormality has been removed.
    Type: Grant
    Filed: January 12, 1988
    Date of Patent: May 16, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ken Matsumura, Hideharu Tezuka
  • Patent number: 4787007
    Abstract: In an output driver semiconductor circuit, a protection circuit is used to protect the output NPN transistor from being destroyed. The protection circuit comprises an excessive current detector for detecting an excessive collector current of the output NPN transistor, an excessive temperature detector for detecting an excessive temperature of the output transistor, and an OR gate for taking a logical sum of output signals of the detectors. According to the output signal of the OR gate, a base current of the control NPN transistor is controlled, so that a base current of the output transistor is kept below a predetermined value.
    Type: Grant
    Filed: March 11, 1987
    Date of Patent: November 22, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ken Matsumura, Hideharu Tezuka
  • Patent number: 4644183
    Abstract: A pulse generator circuit includes first and second capacitors, first and second switches connected in parallel with each other, an inverter circuit for inverting an input signal, first switch control circuit for charging the first capacitor in response to a high level output signal from the inverter circuit, discharging the first capacitor with a predetermined time constant in response to a low level output signal, and respectively setting the first switch to a conductive or nonconductive state in response to a voltage across the first capacitor whose level is higher or lower than the predetermined voltage level, and second switch control circuit for charging the second capacitor in response to high level input signal, discharging the second capacitor at a predetermined time constant in response to a low level input signal, and respectively setting the second switch to a conductive or nonconductive state in response to a voltage across the second capacitor whose level is higher or lower than a predetermined
    Type: Grant
    Filed: June 27, 1984
    Date of Patent: February 17, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideharu Tezuka
  • Patent number: 4325019
    Abstract: A current stabilizer has a current mirror including first and second terminals through which first and second currents flow. A transistor circuit including a transistor and a resistor is connected to the first terminal so as to cause the first current to flow therein, which first current defines the current which may flow through the second terminal. The biasing of the transistor is selected with respect to the temperature coefficients of the transistor and resistor so that the first current remains constant and temperature independent.
    Type: Grant
    Filed: September 19, 1980
    Date of Patent: April 13, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hideharu Tezuka
  • Patent number: 4287436
    Abstract: An electrical circuit for driving an inductive load includes an output transistor of one conductivity type and a detector transistor of the other conductivity type. The output transistor has an emitter connected to a power source, a base to which an input signal is supplied, and a collector connected to one end of an inductive load. The detector transistor has an emitter connected to the collector of the output transistor, a base connected to the other end of the inductive load, and a collector connected to the base of the output transistor. When the output transistor is rendered nonconductive, high counter electromotive force is induced between both ends of the inductive load. Thereby the detector transistor turns on and the output transistor is rendered conductive again.
    Type: Grant
    Filed: May 18, 1979
    Date of Patent: September 1, 1981
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hideharu Tezuka, Yuuichiro Furukawa