Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.

Abstract: According to the present invention, there is provided a power divider/combiner in which two transmission lines configured to connect between respective input/output terminals and an isolation resistor are at least partially adjusted to have suitable impedances during an even-mode operation and an odd-mode operation, for each of the even mode operation and the odd mode operation, to thereby ensure satisfactory reflection characteristics at the respective input/output terminals during the odd-mode operation, a satisfactory reflection characteristic at a common terminal during the even-mode operation, and satisfactory reflection characteristics at the respective input/output terminals during the even-mode operation over a wide band.

Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.

Abstract: A semiconductor package includes a package main body. The package main body includes: a lead frame that includes first terminals and a die pad; two or more integrated circuit chips that are disposed on the die pad; one or more electrically conductive members that are disposed on the die pad; wires that connect the first terminals and the integrated circuit chips electrically; and a molded member that seals the lead frame, the integrated circuit chips, the electrically conductive member, and the wires. An upper surface, a bottom surface, and side surfaces of the package main body are formed by the molded member. The electrically conductive member is exposed through the upper surface of the package main body, and the die pad is exposed through the bottom surface of the package main body.

Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.

Abstract: Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.

Abstract: Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.

Abstract: A semiconductor package includes a package main body. The package main body includes: a lead frame that includes first terminals and a die pad; two or more integrated circuit chips that are disposed on the die pad; one or more electrically conductive members that are disposed on the die pad; wires that connect the first terminals and the integrated circuit chips electrically; and a molded member that seals the lead frame, the integrated circuit chips, the electrically conductive member, and the wires. An upper surface, a bottom surface, and side surfaces of the package main body are formed by the molded member. The electrically conductive member is exposed through the upper surface of the package main body, and the die pad is exposed through the bottom surface of the package main body.

Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.

Abstract: A printed wiring board includes conductor layers, a core layer having an opening, and a build-up layer. A high frequency device placed within the opening is installed such that a mirror surface is thermally connected to a conductor layer for heat dissipation facing the opening from a lower surface side of the core layer, and terminals on the terminal surface are electrically connected to conductor layers formed on an upper surface side of the core layer.

Abstract: A recess in a metal housing accommodating a high frequency package includes a first space and a second space and has a winners podium shape in cross-sectional view. A thermally conductive material is sandwiched between the metal housing having heat dissipating fins and the high frequency package.

Abstract: A lead frame includes: a second terminal that is disposed to surround terminals on a package plane and can be grounded; and a conductive member that covers molded resin and is electrically connected to the second terminal.

Abstract: A printed wiring board includes conductor layers, a core layer having an opening, and a build-up layer. A high frequency device placed within the opening is installed such that a mirror surface is thermally connected to a conductor layer for heat dissipation facing the opening from a lower surface side of the core layer, and terminals on the terminal surface are electrically connected to conductor layers formed on an upper surface side of the core layer.

Abstract: A recess in a metal housing accommodating a high frequency package includes a first space and a second space and has a winners podium shape in cross-sectional view. A thermally conductive material is sandwiched between the metal housing having heat dissipating fins and the high frequency package.

Abstract: A lead frame includes: a second terminal that is disposed to surround terminals on a package plane and can be grounded; and a conductive member that covers molded resin and is electrically connected to the second terminal.

Abstract: Disclosed is a directional coupler including a broadside coupled line 1031 provided with a main signal line conductor 1001 and a secondary signal line conductor 1011 arranged in parallel with the main signal line conductor 1001, and an offset broadside coupled line 1032 provided with a main signal line conductor 1002 having an end portion connected to an end portion of the main signal line conductor 1001 and a second secondary signal line conductor 1012 having an end portion connected to an end portion of the secondary signal line conductor 1011, and arranged in parallel with the main signal line conductor 1002, in which a coupled line impedance in the broadside coupled line 1031 is lower than a terminal impedance and a coupled line impedance in the offset broadside coupled line 1032 is higher than the terminal impedance.

Abstract: Disclosed is a directional coupler including a broadside coupled line 1031 provided with a main signal line conductor 1001 and a secondary signal line conductor 1011 arranged in parallel with the main signal line conductor 1001, and an offset broadside coupled line 1032 provided with a main signal line conductor 1002 having an end portion connected to an end portion of the main signal line conductor 1001 and a second secondary signal line conductor 1012 having an end portion connected to an end portion of the secondary signal line conductor 1011, and arranged in parallel with the main signal line conductor 1002, in which a coupled line impedance in the broadside coupled line 1031 is lower than a terminal impedance and a coupled line impedance in the offset broadside coupled line 1032 is higher than the terminal impedance.