Patents by Inventor Hidehiko Aoki

Hidehiko Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7065348
    Abstract: A method for providing location information. In the method a demand of providing location information of a terminal of a second user is accepted from a terminal of a first user. An approval of the location information provided to a terminal of the second user is requested, which depends on a request of providing the location information. A reply for approving providing the location information is received from the second terminal. Map information of the first and the second user which includes each other's location information is then generated, the location information which was provided from the first and second user's terminal is synthesized, and map data chosen based on the location information from the data base, when providing the location information, is approved. The generated map information is displayed at least on the first user's terminal.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: June 20, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 5402011
    Abstract: A small value current source circuit utilized in bipolar integrated circuits. A reference potential is level-shifted by a first level shift circuit and applied to one input of a differential amplifier. The reference potential is also level-shifted by a second level shift circuit and applied to the other input of the differential amplifier. A constant current source circuit supplies currents both proportional to the currents flowing in the differential amplifier and of mutually different values to the first and second level shift circuits. The differential amplifier amplifies the difference of the input voltages and produces an output current.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: March 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 5396188
    Abstract: An active filter circuit has a filter circuit main part including a first conductance amplifier and a second conductance amplifier in which conductances are each proportional to currents or voltages of control input signals; a first signal generation circuit for generating a current or voltage which corresponds to a first signal; a second signal generation circuit for generating a current or voltage which corresponds to a second signal; a third signal generation circuit for generating a current or voltage which corresponds to a third signal; a first control signal generation circuit for generating a first control signal in accordance with a multiplication of the first signal and a fourth signal which is a ratio of the second signal to the third signal and supplying the multiplication signal to the first conductance amplifier; and second control signal generation circuit for generating a second control signal in accordance with a multiplication of the first signal and a fifth signal which is inverse ratio of t
    Type: Grant
    Filed: March 24, 1993
    Date of Patent: March 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 5303397
    Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit. The first circuit is set into an operative state in a first mode and into a non-operative state in a second mode, and the transfer characteristic thereof depends on an externally attached impedance circuit. The second circuit is set into an operative state in the second mode and into a non-operative state in the first mode. A resistor is externally connected to the second circuit. A third circuit for keeping a voltage applied across the resistor constant and deriving a current flowing in the resistor in the first mode irrespective of the presence or absence and the magnitude of a voltage applied to one end of the resistor is provided in the first circuit. The resistor is commonly used by the first circuit and the second circuit.
    Type: Grant
    Filed: July 31, 1991
    Date of Patent: April 12, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 4926271
    Abstract: A control circuit for a recording and reproducing apparatus. The circuit includes a single magnetic head for recording and reproducing signals corresponding to data on a recording medium, a recording circuit for supplying a recording signal to be recorded to the magnetic head, a reproducing circuit for amplifying a reproduced signal detected from the recording medium by the magnetic head; and a switch for selectively shifting the apparatus between a recording phase wherein the recording circuit is activated, and a reproducing phase wherein the reproducing circuit is activated, wherein the reproducing circuit includes capacitors for storing an electric charge during operation of the apparatus, and buffers for maintaining the charge stored by the capacitors at a substantially constant level when the switch shifts between the recording phase and the reproducing phase.
    Type: Grant
    Filed: July 27, 1988
    Date of Patent: May 15, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidehiko Aoki, Yoshihiko Kanbara
  • Patent number: 4825617
    Abstract: In an open joint structure for the prevention of water leakage an isobaric space is formed which has no difference between pressure in the space and ambient pressure. The open joint structure contains at least one groove 11 extending in the vertical direction formed on the exterior side of a vertical edge of a precast concrete curtain wall and which faces an opposing groove 11 of an adjacent precast concrete curtain wall. A heat barrier plate 10 with cutout portions on through holes 13 is mounted between the side walls in the grooves, thereby dividing the isobaric space into a fire-blocking isobaric space (A) between the exterior side of the wall and the heat barrier plate 10 and a radiant heat-blocking isobaric space (B) between the heat barrier plate 10 and a pair of preformed sealants 20, 20. This structure exhibits both a fire-resistant function and a watertight function in an open construction method.
    Type: Grant
    Filed: March 5, 1987
    Date of Patent: May 2, 1989
    Assignees: Kawatetsu Kenzai Kogyo Co., Ltd., Miyoshi Shokai Co., Ltd.
    Inventors: Ryoji Kinoshita, Keizou Misawa, Hideaki Watanabe, Hidehiko Aoki, Toshio Kurokawa, Hidefumi Ono
  • Patent number: 4752744
    Abstract: A balanced transformer-less amplifier having a pair of power amplifers connected in parallel for outputting amplified signals of opposite polarity, offset output detection circuit coupled to the amplifiers for detecting the difference in voltage level between the outputs of the two power amplifiers, and a preamplifier responsive to the offset output detection circuit both for operating the pair of power amplifiers on only a single power source voltage and for compensating for the difference in voltage level between the outputs of the two power amplifiers.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: June 21, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 4654602
    Abstract: A current mirror circuit suitable for a wide range input current and low voltage integrated circuit.
    Type: Grant
    Filed: December 24, 1985
    Date of Patent: March 31, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 4578633
    Abstract: A circuit produces a stable constant current during power source voltage fluctuations which includes resistance means and first, second, third, fourth, fifth and sixth transistor devices. The first and second transistor devices are of a first conductivity type and are connected to form a first current mirror circuit, the first transistor device being connected as a diode. The third and fourth transistor devices are of a second conductivity type and are connected to each other to form a second current mirror circuit, the third transistor device being connected in series with the second transistor device, and the fourth transistor device being connected as a diode. The fifth transistor device is connected at its collector-emitter path in series with the first transistor device and at its base to the connection point between the second and third transistor devices. The resistance means is connected between the first and fifth transistor devices.
    Type: Grant
    Filed: August 31, 1984
    Date of Patent: March 25, 1986
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidehiko Aoki
  • Patent number: 4536716
    Abstract: A stereo amplifier circuit which comprises a first circuit responsive to a first input signal and to a second input signal for generating a first output signal which corresponds to the potential difference between the first and second input signals, a second circuit responsive to the first and second input signals for generating a second output signal which corresponds to the potential difference between the second and first input signals, a third circuit responsive to the first and second input signals for generating a third output signal which corresponds to the sum of the first and second input signals. The third output signal contains signal components being antiphasic to the first and second input signals.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: August 20, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshihiro Yoshida, Hidehiko Aoki