Patents by Inventor Hidehiko Shoji

Hidehiko Shoji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110157258
    Abstract: A stable address discharge is caused to enhance the image display quality. For this purpose, a plasma display panel, a scan electrode driving circuit, and a partial light-emitting rate detecting circuit are provided. The scan electrode driving circuit performs an address operation by applying a scan pulse to scan electrodes in address periods. The partial light-emitting rate detecting circuit divides the display area of the plasma display panel into a plurality of regions, and detects a rate of the number of discharge cells to be lit with respect to the number of all the discharge cells in each region, as a partial light-emitting rate, in each subfield. In a predetermined subfield where the number of sustain pulses is smaller than the number of sustain pulses in the immediately preceding subfield, the scan electrode driving circuit changes the order of applying the scan pulse to the scan electrodes, according to the partial light-emitting rates in the immediately preceding subfield.
    Type: Application
    Filed: June 3, 2009
    Publication date: June 30, 2011
    Applicant: Panasonic Corporation
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Tomoyuki Saito
  • Patent number: 7969388
    Abstract: Initialization waveforms with different voltages are applied respectively to a predetermined subfield with a small number of sustain pulses, and a subfield with the smallest number of sustain pulses in subfields other than the predetermined subfield. This offers a plasma display device that achieves a correct write operation in all discharge cells even if discharge interference occurs between adjacent cells, and also achieves a high contrast.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventors: Minoru Takeda, Hidehiko Shoji
  • Publication number: 20110109653
    Abstract: In a two-phase driving operation that is performed in at least one sub-field when an average luminance level is a predetermined value or more, a first ramp waveform that drops from a first potential to a second potential is applied to a plurality of first electrodes, a second ramp waveform that drops from a third potential that is higher than the first potential to a fourth potential that is higher than the second potential is applied to a plurality of second scan electrodes in a setup period, and a scan pulse is sequentially applied to the plurality of first scan electrodes, and then a scan pulse is sequentially applied to the plurality of second electrodes in a write period. The two-phase driving operation is employed to prevent discharge failures during write discharges.
    Type: Application
    Filed: August 26, 2008
    Publication date: May 12, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Hideki Nakata
  • Publication number: 20110090195
    Abstract: A driving device drives a plasma display panel having a plurality of discharge cells at intersections of a plurality of scan electrodes and a plurality of sustain electrodes with a plurality of data electrodes by a sub-field method. A scan electrode drive circuit applies a first ramp waveform that drops from a first potential to a second potential to the plurality of scan electrodes in a first period in a setup period of a sub-field. A sustain electrode drive circuit applies a second ramp waveform that drops from a fourth potential to a fifth potential to the plurality of sustain electrodes when a potential detection circuit detects that the plurality of scan electrodes attain a third potential that is lower than the first potential and higher than the second potential in the first period.
    Type: Application
    Filed: February 17, 2009
    Publication date: April 21, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji
  • Patent number: 7924239
    Abstract: An image display device includes a pair of sustain pulse generators for applying either a first sustain pulse or a second sustain pulse to the display electrodes. The first and second sustain pulses generate a sustain discharge twice and once, respectively, in discharge cells when the voltage applied between the display electrodes changes. The application of the first sustain pulse is performed by generating a first discharge by applying a voltage to one of the display electrodes using the clamp corresponding to the one of the display electrodes, and then generating a second discharge by applying a voltage to the other of the display electrodes using the clamp corresponding to the other of the display electrodes. The application of the second sustain pulse is performed by generating a first discharge by applying a voltage to each of the display electrodes using the clamps corresponding to each of the display electrodes.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: April 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Yutaka Yoshihama, Hidehiko Shoji, Hironari Taniguchi
  • Publication number: 20110050752
    Abstract: Crosstalk between adjacent discharge cells is reduced for a stable sustain discharge. A plasma display panel has scan electrodes and sustain electrodes arranged so that the positions of the corresponding scan electrode and sustain electrode are alternately interchanged in each display electrode pair, and image signal processing circuit converts an image signal into image data indicating light emission and no light emission in each discharge cell in each subfield. The image signal processing circuit generates the image data so that a combination of image data is avoided. One of two adjacent discharge cells having side-by-side scan electrodes is lit and the other of the discharge cells is unlit in one subfield of a plurality of subfields forming one field, and the one of the discharge cells is unlit and the other of the discharge cells is lit in a subfield after the one subfield in the same field.
    Type: Application
    Filed: May 13, 2009
    Publication date: March 3, 2011
    Applicant: Panasonic Corporation
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Kazuhiro Yamada
  • Publication number: 20100277465
    Abstract: The wall charge is appropriately adjusted in the initializing period, and occurrence of an abnormal discharge and an unlit cell is suppressed in the address period. Therefore, a plasma display device has a plasma display panel having a plurality of discharge cells including a display electrode pair that is formed of a scan electrode and a sustain electrode, and a scan electrode driving circuit. The scan electrode driving circuit disposes a plurality of subfields having an initializing period, an address period, and a sustain period in one field, generates a decreasing down-ramp voltage in the initializing period, and generates a negative scan pulse voltage and applies it to the scan electrodes in the address period. In the initializing period, after the generation of the down-ramp voltage, the scan electrode driving circuit generates negative pulse voltage lower than the minimum voltage of the down-ramp voltage and applies it to the scan electrodes.
    Type: Application
    Filed: March 27, 2009
    Publication date: November 4, 2010
    Inventors: Naoyuki Tomioka, Hidehiko Shoji
  • Publication number: 20100265219
    Abstract: A two-phase driving operation is performed by a first circuit and a second circuit in at least one sub-field. The first circuit applies a first ramp waveform that drops from a first potential to a second potential to a plurality of first scan electrodes in a setup period, and sequentially applies a scan pulse to the plurality of first scan electrodes in a write period. The second circuit applies a second ramp waveform that drops from the first potential to a third potential that is higher than the second potential to a plurality of second scan electrodes in the setup period, and holds the second scan electrodes at a fourth potential that is higher than the third potential in a period where the scan pulse is applied to the first scan electrodes, and then sequentially applies a scan pulse to the plurality of second electrodes in the write period. Discharge failures during write discharges can be prevented from occurring by applying the two-phase driving operation.
    Type: Application
    Filed: September 4, 2008
    Publication date: October 21, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Naoki Noguchi, Hidehiko Shoji, Takahiko Origuchi, Kenji Ogawa, Toshiyuki Maeda
  • Patent number: 7808452
    Abstract: A method for driving a plasma display panel including discharge cells at the intersections of data electrodes D1 to Dm and pairs of scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn. One field period is composed of a plurality of subfields each including a writing period and a sustain period. During the writing period, a writing discharge is generated in a selected one of the discharge cells. During the sustain period, a sustain discharge is generated in the selected discharge cell. A voltage to be applied to sustain electrodes SU1 to SUn in the writing period of the subfield having the lowest display luminance of all the subfields is set higher than a voltage to be applied to sustain electrodes SU1 to SUn in the writing period of the subfields other than the subfield having the lowest display luminance.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: October 5, 2010
    Assignee: Panasonic Corporation
    Inventors: Hidehiko Shoji, Takahiko Origuchi
  • Publication number: 20100207917
    Abstract: In a plasma display panel apparatus, luminance when a display state of a panel is all-black (all pixels display black throughout one field period) is reduced. In a first period (t7 to t8), in which a first ramp waveform (RW2) dropping from a first potential to a second potential (?Vad+Vset2) is applied to a plurality of scan electrodes (SCi), within a setup period, a second ramp waveform dropping from a third potential (Ve1) to a fourth potential (Ve1?Vf2) is applied to a plurality of sustain electrodes (SUi) in a second period (t7a to t8) in the case of not all-black, and a third ramp waveform (RW40) dropping from the third potential (Ve1) to a fifth potential (Ve1?Vf2?Vu) is applied to the plurality of sustain electrodes (SUi) in a third period (t7x to t8) which is longer than the second period (t7a to t8) in the case of all-black. In addition, a scan pulse (Pa) is not applied to the plurality of scan electrodes (SCi) in a write period in the case of all-black.
    Type: Application
    Filed: August 20, 2008
    Publication date: August 19, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hidehiko Shoji, Takahiko Origuchi
  • Publication number: 20100201678
    Abstract: A first ramp waveform (RW1) rising from a first potential (Vscn) to a second potential (Vscn+Vset) is applied to a plurality of scan electrodes (SCi) in a first period (t5 to t6), and a driving waveform dropping from a third potential (Ve1) to a fourth potential (0V) is applied to a plurality of sustain electrodes (SUi) before the first period (t5 to t6), and the plurality of sustain electrodes are held at the fourth potential (0V) in the first period (t5 to t6). At this time, a second ramp waveform (RW10) rising from a fifth potential (0 V) to a sixth potential (Vd) according to change of a potential of the first ramp waveform (RW1) is applied to a plurality of data electrodes (Dj) in a second period (t5 to t5a) that starts at a starting time point (t5) of the first period (t5 to t6) and is shorter than the first period (t5 to t6), thereby preventing generation of strong discharges between the plurality of data electrodes (Dj) and the plurality of scan electrodes (SCi).
    Type: Application
    Filed: August 20, 2008
    Publication date: August 12, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Yasuaki Mutou, Takateru Sawada
  • Publication number: 20100194732
    Abstract: In a setup period of a first SF, a first ramp waveform (L2) that drops from a first potential (Vsus) to a second potential (?Vad+Vset2) is applied to scan electrodes belonging to a first scan electrode group. On the other hand, a second ramp waveform (L3) that drops from a third potential (Vsus+Vscn) higher than the first potential (Vsus) to a fourth potential (?Vad+Vscn) higher than the second potential (?Vad+Vset2) is applied to scan electrodes belonging to a second scan electrode group. In addition, a scan pulse (Pa) is sequentially applied to the scan electrodes belonging to the first scan electrode group, and then a third ramp waveform (L4) that drops to the second potential (?Vad+Vset2) and a scan pulse (Pa) are sequentially applied to the scan electrodes belonging to the second scan electrode group in a write period of the first SF.
    Type: Application
    Filed: June 10, 2008
    Publication date: August 5, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Hideki Nakata
  • Publication number: 20100188386
    Abstract: A stable address discharge is generated to achieve a high quality of image display. For this purpose, a plasma display panel, a scan electrode driving circuit, and a partial light-emitting rate detecting circuit are provided. The scan electrode driving circuit performs an address operation by sequentially applying a scan pulse to scan electrodes in an address period. The partial light-emitting rate detecting circuit divides the display area of the plasma display panel into a plurality of regions, and detects a rate of the number of discharge cells to be lit with respect to the number of discharge cells, as a partial light-emitting rate, in each of the regions. The scan electrode driving circuit performs the address operation earlier on the regions having the higher light-emitting rates detected in the partial light-emitting rate detecting circuit in decreasing order of value.
    Type: Application
    Filed: November 12, 2008
    Publication date: July 29, 2010
    Applicant: Panasonic Corporation
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Hideki Nakata
  • Publication number: 20100177088
    Abstract: A voltage of sustain electrodes (SU1 to SUn) is lowered from Ve1 to a ground potential at a time point t1 immediately before a first SF (sub-field). Then, a pulsed positive voltage Vd is applied to data electrodes (D1 to Dm) at a starting time point t2 of a setup period of the first SF. Immediately before this, a large amount of negative wall charges is stored on the sustain electrodes (SU1 to SUn) and positive wall charges are stored on the data electrodes (D1 to Dm), and therefore application of the pulsed positive voltage Vd to the data electrodes (D1 to Dm) generates strong discharges between the sustain electrodes (SU1 to SUn) and the data electrodes (D1 to Dm). After that, application of a ramp voltage to scan electrodes (SC1 to SCn) is started at a time point t5, generating setup discharges between the scan electrodes (SC1 to SCn) and the sustain electrodes (SU1 to SUn).
    Type: Application
    Filed: July 10, 2008
    Publication date: July 15, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji
  • Patent number: 7750871
    Abstract: An image display method for allowing an image display device having a large number of pixels arrayed in a planar form to perform an image display by forming one field period from plural sub-fields for which luminance weights to be displayed are determined, and choosing plural luminances among displayable luminances as luminances for display by combining the luminance weights of the sub-fields, so that the respective pixels are controlled not to emit light or to emit light in each sub-field correspondingly to the luminances for display to be displayed. At least one threshold value is set, and when a pixel is allowed to emit light at a luminance for display at or higher than a first threshold value, which is the smallest threshold value, the pixel is controlled not to emit light constantly or to emit light constantly in a sub-field having the smallest luminance weight.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: July 6, 2010
    Assignee: Panasonic Corporation
    Inventors: Hidehiko Shoji, Takahiko Origuchi, Minoru Takeda, Akira Yawata, Hiroko Yamamoto
  • Publication number: 20100128023
    Abstract: Any of first and second sub-field configurations is selected. In the first sub-field configuration, a width of a write pulse of a sub-field with a lowest display luminance is not more than widths of write pulses of the other sub-fields. In the second sub-field configuration, the width of the write pulse of the sub-field with the lowest display luminance is larger than the widths of the write pulses of the other sub-fields. When the first sub-field configuration is selected, a voltage applied to a sustain electrode in a write period of the sub-field with the lowest display luminance is set higher than a voltage applied to the sustain electrode in write periods of the other sub-fields. When the second sub-field configuration is selected, the voltage applied to the sustain electrode in the write period of the sub-field with the lowest display luminance is set to be the same as the voltage applied to the sustain electrode in the write period of any of the other sub-fields.
    Type: Application
    Filed: September 13, 2006
    Publication date: May 27, 2010
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hidehiko Shoji, Takahiko Origuchi
  • Publication number: 20100118056
    Abstract: In a plasma display device and a method for driving a plasma display panel, fluctuation of emission luminance of a discharge cell is reduced and display quality of an image is improved. The plasma display device is provided with a plasma display panel having a plurality of scanning electrodes and sustaining electrodes which configure a display electrode pair. The plasma display device is also provided with a sustaining pulse generating circuit, which has a plurality of subfields having an initializing period, a writing period and a sustaining period in one field period, and generates three kinds of sustaining pulses, i.e., a first sustaining pulse to be reference, a second sustaining pulse whose start-up is sharper than that of the first sustaining pulse and that of a third sustaining pulse, and the third sustaining pulse whose trailing edge is sharper than that of the first sustaining pulse and that of the second sustaining pulse, by periodically switching the pulses.
    Type: Application
    Filed: July 6, 2007
    Publication date: May 13, 2010
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Mitsuo Ueda, Toshiyuki Maeda
  • Publication number: 20100103161
    Abstract: A voltage of sustain electrodes (SU1 to SUn) is lowered from Ve1 to a ground potential at a time point t1 immediately before a first SF (sub-field). Then, a pulsed positive voltage Vd is applied to data electrodes (D1 to Dm) at a starting time point t2 of a setup period of the first SF. Immediately before this, a large amount of negative wall charges is stored on the sustain electrodes (SU1 to SUn) and positive wall charges are stored on the data electrodes (D1 to Dm), and therefore application of the pulsed positive voltage Vd to the data electrodes generates strong discharges between the sustain electrodes (SU1 to SUn) and the data electrodes (D1 to Dm). After that, application of a ramp voltage to scan electrodes (SC1 to SCn) is started at a time point t3, generating setup discharges between the scan electrodes (SC1 to SCn) and the sustain electrodes (SU1 to SUn).
    Type: Application
    Filed: December 4, 2007
    Publication date: April 29, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Kenji Ogawa, Takayuki Kamatani, Toshiyuki Maeda
  • Patent number: 7701419
    Abstract: A first group of data drivers is connected to a sub-field processor, a first power recovery circuit, and a PDP, and a second group of data drivers is connected to a sub-field processor, a second power recovery circuit, and a PDP. The first and second groups of data drivers apply to the PDP data pulses that differ in phases. The first and second power recovery circuits generate a voltage for generating the data pulses to the first and second groups of data drivers due to LC resonance, and discharge and recover charges to and from the PDP. Recovery potentials of recovery capacitors in the first and second power recovery circuits are changed depending on the number of times of switching between discharges and non-discharges of discharge cells in the PDP.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: April 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Hidehiko Shoji, Kazuo Oohira, Hironari Taniguchi
  • Publication number: 20100066721
    Abstract: A first ramp waveform rising from a first potential (Vi1) to a second potential (Vi2) is applied to a plurality of scan electrodes (SC) in a first half period of a setup period, and a third ramp waveform rising from a fifth potential (a ground potential) to a sixth potential (Vi5, Vi5?) is applied to a plurality of sustain electrodes (SU) in a period, which is shorter than the first half period, within the first half period. A second ramp waveform dropping from a third potential (Vi3) to a fourth potential (Vi4) is applied to the plurality of scan electrodes (SC) in the second half period following the first half period, and a fourth ramp waveform dropping from a seventh potential (Ve) to an eighth potential (Vi6, Vi6?) is applied to the plurality of sustain electrodes (SU) in a period, which is shorter than the second half period, within the second half period. Then, a peak value of the third ramp waveform and a peak value of the fourth ramp waveform are changed based on a state of a plasma display panel.
    Type: Application
    Filed: November 28, 2007
    Publication date: March 18, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Hidehiko Shoji