Abstract: A technology to facilitate realization of facsimile transmission of an image over a network is provided. A facsimile device includes an image data storage unit to store received image and an output device connection unit that connects the facsimile device to an image output device. The output device connection unit can switch the logical connection to the image output device between a connected state and a disconnected state. File management of the image data storage unit is performed by the image output device during the logical connection is in the connected state. The facsimile device receives the image data in the disconnected state, switches the logical connection to the connected state after the reception of the image data, transfers the image data stored in the image data storage unit to the image output device, and switches the logical connection to the disconnected state after the image data is transferred.

Abstract: A technology to facilitate realization of facsimile transmission of an image over a network is provided. A facsimile device includes an image data storage unit to store received image and an output device connection unit that connects the facsimile device to an image output device. The output device connection unit can switch the logical connection to the image output device between a connected state and a disconnected state. File management of the image data storage unit is performed by the image output device during the logical connection is in the connected state. The facsimile device receives the image data in the disconnected state, switches the logical connection to the connected state after the reception of the image data, transfers the image data stored in the image data storage unit to the image output device, and switches the logical connection to the disconnected state after the image data is transferred.

Abstract: A system LSI is connected with a first memory which is a bus slave connected to a low-speed bus and with a second memory which is another bus slave connected to a high-speed bus. The system LSI includes a first bus master which accesses to the first memory through the low-speed bus and a second bus master which accesses to the second memory through the high-speed bus. The first bus master can also access to the second memory through the low-speed bus. Thus, the second memory is shared by the first and the second bus masters.

Abstract: A method is disclosed for driving a memory cell formed of a ferroelectric capacitor FC and a transistor Tr. While maintaining a cell plate line CP at an intermediate voltage level Vcc/2 of a power supply voltage, a bit line BL is precharged to a voltage equal to Vcc/2. Data is read by detecting a change in voltage on the bit line BL which occurs when the bit line BL is released from the precharged state in a period in which word line WL0 is selected. Data is written by changing the voltage on the cell plate line CP in a stepped fashion in the order of Vcc/2, Vcc, 0 V, and Vcc/2, while applying a write voltage to the bit line after releasing the bit line from the precharged state, in a period in which a word line is selected. This method allows a ferroelectric memory cell to be driven at a high speed with low power consumption. Furthermore, the method allows a ferroelectric memory cell to be polarized to a sufficient degree, and thus the ferroelectric memory cell can be driven in a highly reliable fashion.