Abstract: A synchronization of a multichannel receiver based on higher-quality channels capable of establishing and maintaining timing synchronism stably even when the transmission channels deteriorate due to fading. A plurality of power detectors measure the quality of the baseband signals of a plurality of channel lines and generate a quality signal. A plurality of equalizers generate timing phase deviation signals for the channel lines. A selecting circuit selects at least one channel line using the quality signal. A frequency controlling circuit generates a frequency control signal in accordance with at least one timing phase deviation signal from the selected channel line and controls a sampling frequency of a sampling circuit which converts a transmitted signal into digital form. Thus, the sampling frequency for all channel lines is determined by using the timing phase deviation signal obtained from a high quality channel line. As a result, the timing phase control can be established with stability.

Abstract: A reference data sequence is transmitted and applied to a first automatic equalizer which is arranged in a reference channel. The transmitted reference data is used to establish an initial equalization of the first automatic equalizer. On the other hand, the transmitted reference data sequence is scrambled and is used to establish an initial equalization of another automatic equalizer to which another data sequence obtained by scrambling the reference data sequence is transmitted.

Abstract: The fading protection system protects against fading selectively occuring in a specific channel of a plural data transmission system. An equalizer is provided in each channel and adapted to equalize received data. An error correction mechanism is also provided for correcting errors of the received data in at least any one channel. A comparator associated with each channel is provided to deliver a first signal when the level of the received data in the associated channel has been reduced below a predetermined first threshold to indicate a level reduced channel. A controller operates in response to the first signal so as to deliver, as reference data, the correct data, after correction by the error correcting mechanism, to the equalizer provided in the level reduced channel.

Abstract: A second-order phase-locked loop (PLL) is provided following a demodulating section which is arranged to detect the baseband signals of incoming parallel channel signals. The second-order PLL, which is supplied with a baseband signal of a pilot channel from the demodulating section, includes a first and second control loops. The first control loop is adapted to correct a static phase shift of the pilot channel signal, while the second control loop functions to correct an abrupt frequency offset of same. The second-order PLL is further utilized to correct both static phase shifts and abrupt frequency offsets of data channels (viz., channels other than the pilot channel). A third control loop is further provided which extends between the second-order PLL and the input of the demodulating section, and which has a function by which static or slowly changing frequency offsets of the channels are compensated.

Abstract: In order to establish accurate sample timing in a digital demodulator which forms part of an orthogonally multiplexed parallel data transmission system, two second-order PLLs are arranged after a demodulating section of the digital demodulator so as to receive baseband signals of corresponding pilot channels. The two second-order PLLs each includes an integrator. These integrators apply the outputs thereof to a subtracter which applies the subtraction result to a voltage-controlled oscillator in order to establish the accurate sample timing.