Abstract: A selector circuit for selecting and outputting plural pieces of output data from input data including plural bits, in which each of the pieces of the output data including plural bits is provided. The selector circuit includes plural first swap circuits, each of the bits of the input data being input to any of the plural first swap circuits, the plural first swap circuits being configured to reorder and output the input bits or output the input bits without reordering; a bus configured to transfer the bits output from the first swap circuits; and plural data field specifying circuits respectively configured to select and take out a predetermined number of continuous bits on the bus. Plural bits taken out by any of the data field specifying circuits are included in the respective pieces of the output data.

Abstract: Disclosed is an SIMD-type microprocessor comprising a processor element group, plural processor elements with an operation part and a register file being arranged therein and a processor element control signal generator configured to output a processor element control signal controlling an operation of the processor element, wherein a feed part configured to feed a processor element control signal output from the processor element control signal generator to the processor element is provided at a center of the processor element group.

Abstract: A disclosed SIMD microprocessor includes a processor element unit including multiple processor elements; and a global processor unit configured to interpret a program pre-recorded in a memory and supply a control signal to the processor element unit. Each of the processor elements includes an operational circuit; a first forwarding path for forwarding, to an input side of the operational circuit, an operation result obtained by the operational circuit; second forwarding paths, each of which forwards, to the input side of the operational circuit, an operation result obtained by an operational circuit of a neighboring processor element among the multiple processor elements; and a selection unit configured to select one of the first forwarding path and the second forwarding paths.

Abstract: Disclosed is an SIMD-type microprocessor comprising a processor element group, plural processor elements with an operation part and a register file being arranged therein and a processor element control signal generator configured to output a processor element control signal controlling an operation of the processor element, wherein a feed part configured to feed a processor element control signal output from the processor element control signal generator to the processor element is provided at a center of the processor element group.

Abstract: A SIMD type microprocessor that has two or more processor elements (PEs), and two or more computing units for every processor element (PE) is disclosed. According to the SIMD type microprocessor, each PE includes M arithmetic logic-operation circuits (M is a natural number 2 or greater), M registers for storing operation results corresponding to the arithmetic logic-operation circuits, and M condition registers for storing condition data output by the arithmetic logic-operation circuits. When a conditional command is issued, each arithmetic logic-operation circuit determines whether to perform a requested operation based on the condition data stored in the corresponding condition register.