Patents by Inventor Hideho Itoh

Hideho Itoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5515260
    Abstract: A current-voltage conversion circuit which is capable of performing logarithmic compression is obtained using only CMOS processes. An emitter of a PNP transistor (10) and a current input terminal (51) are connected commonly to a reverse input terminal of an operational amplifier (53), while a first reference voltage input terminal is connected to a non-reverse input terminal of the operational amplifier (53). A collector of the PNP transistor (10) is grounded and a base of the PNP transistor (10) is connected to an output terminal of the operational amplifier (53) and an output terminal (55). A current (I) is supplied to the current input terminal (51) while a first reference voltage (V.sub.REF1) is applied to the first reference voltage input terminal. The PNP transistor (10) is formed by CMOS processes. The current-voltage conversion circuit is manufactured in a shorter manufacturing time and at a reduced cost.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: May 7, 1996
    Assignees: Mitsubishi Electric Engineering Co., Ltd., Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fumihiro Watanabe, Fumihide Murao, Hiroshi Murakami, Hideo Hara, Hideho Itoh, Tatsuya Hohmoto