Abstract: In a receiving apparatus for spread spectrum communications, a carrier detecting circuit for detecting a carrier in a spread spectrum modulated signal is intermittently operated in a standby mode.

Abstract: In a spread spectrum device including a serial to parallel converter (14) for converting a serial information signal (10) into a parallel signal of n bits, where n represents an integer not smaller than two, an information modulator (20) carries out information modulation on m bits among the n bits of the parallel signal and produces a modulated information signal, where m represents a positive integer smaller than n. A selective spreading code producing circuit (21, 22) has spectrum spreading codes which are equal in number to 2.sup.(n-m) and are different from one another. The selective spreading code producing circuit selectively produces, as a selected spreading code, one of the spectrum spreading codes that is specified by remaining (n-m) bits among the n bits of the parallel signal. A spectrum spreading circuit (23) carries out spectrum spreading on the modulated information signal on the basis of the selected spreading code and produces a spectrum spread signal (13).

Abstract: The object of the present invention is to provide a wireless modem that performs detection with high reliability even in the case of carrier detection by analogue level, and whereby a large decrease in power consumption in standby mode can be obtained. Control unit 80 controls synthesizer 100 during transmission mode so that it transmits from antenna 200 one or two or more unmodulated carriers that have not been subjected to spectrum dispersion, at the head of the transmission preamble signal; in addition it performs on/off control of the output transmission clock pulse and reception clock pulse of clock pulse generating control unit 90, and changeover control of transmission/reception switch 53. Control unit 80 outputs a carrier detection enable signal to level comparator 75. Controlling its operation. In standby mode, control unit 80 controls synthesizer 100 and IF unit 40 such that the received unmodulated carrier can be detected by level detector 60 and level comparator 75.

Abstract: In a spread spectrum device including a serial to parallel converter (14) for converting a serial information signal (10) into a parallel signal of n bits, where n represents an integer not smaller than two, an information modulator (20) carries out information modulation on m bits among the n bits of the parallel signal and produces a modulated information signal, where m represents a positive integer smaller than n. A selective spreading code producing circuit (21, 22) has spectrum spreading codes which are equal in number to 2.sup.(n-m) and are different from one another. The selective spreading code producing circuit selectively produces, as a selected spreading code, one of the spectrum spreading codes that is specified by remaining (n-m) bits among the n bits of the parallel signal. A spectrum spreading circuit (23) carries out spectrum spreading on the modulated information signal on the basis of the selected spreading code and produces a spectrum spread signal (13).

Abstract: In a spectrum spread receiver, a tracking unit tracks successive regions covering maximum correlation values, respectively, in spectrum spread demodulated components to produce a timing signal indicative of synchronous points respectively in the regions. Responsive to the timing signal, a differential demodulator unit demodulates the spectrum spread demodulated components at each synchronous point and at a time which is always one symbol period later than this synchronous point. Differential demodulation is carried out in this manner so as to be faithfully inverse relative to differential modulation in a spectrum spread transmitter.

Abstract: The present invention is an art of spread spectrum modulation systems, wherein a binary serial data is divided into a first bit data and a second bit data, the first bit data is primarily modulated, a spread code corresponding to the second bit data is selected, and the modulated data is spread by multiplying the primarily modulated first bit data by the selected spread code. In reception side, the spread code used for spreading in transmitter is detected in correlator, the second bit data is specified and the first bit data is demodulated.

Abstract: A negative-feedback amplifier prevents deterioration of the open-loop gain and the distortion improvement effect despite changes in a sending frequency by demodulating a baseband signal from a carrier and an output signal of an amplifier and a demodulated baseband signal. The negative-feedback amplifier includes a correcting member for correcting a phase error of the demodulated baseband signal caused by a delay in the amplifier for each change of a sending frequency of the carrier.

Abstract: A receiver for digital radio communications has an equalizer which is powered off for reduced power consumption when received radio waves undergo relatively small intersymbol interference. When intersymbol interference is significantly large, the equalizer is powered on to remove the intersymbol interference for better signal reception. The receiver has a signal quality decision circuit which powers on the equalizer when the quality of the received signal is poor, and powers off the equalizer when the quality of the received signal is good. The receiver consumes a relatively small amount of electric power overall.

Abstract: For recovering symbol timing, the instantaneous phase of a received intermediate frequency M-ary PSK signal is sampled at successive phase sampling points of each symbol interval to produce a series of instantaneous phase values so that the phase sampling points divide the interval into first and second half sections. From the instantaneous phase values a phase angle of each half section is derived and a difference between successive phase angles is then detected for each symbol interval. The phase sampling points are controlled with the difference so that it reduces to zero. Data sampling points are determined from the controlled phase sampling points. In a modification, the instantaneous phase of the PSK signal is sampled at successive phase sampling points which are offset on the opposite sides of the data sampling point to produce a pair of instantaneous phase values, which are then converted to corresponding phase deviations with respect to signal points of the PSK signal.

Abstract: A differential phase demodulator for demodulating a PSK-modulated signal including a zero-cross detector for detecting zero-cross points of intermediate frequency signals of the PSK-modulated signal and generating a zero-cross detection signal; a synchronization circuit for synchronizing an externally supplied baud timing signal with the zero-cross detection signal; an oscillator for generating clock pulses; a counter for counting the clock pulses and producing a pulse count; a phase difference detector for calculating the count per period of the synchronized baud timing signal and outputting the result as the phase difference data; and a decision circuit for outputting demodulated data based on the phase difference data.

Abstract: A phase demodulator for directly demodulating carrier PSK signals, PSK-modulated with digital signals, without using any analog circuit. Where the invention is applied to a demodulator of the different detection type, the baud timing signal is converted into a synchronous band timing signal, synchronized with the first leading edge of the PSK signals converted into "1" or "0" in logical level. Meanwhile, the ring oscillator generates signals of a frequency substantially equal to the carrier frequency of the PSK signals, and generates outputs at N taps. the outputs obtained at the N taps have a 2.pi./N phase difference between every pair of mutually adjoining taps, and are latched with the synchronous baud timing signal in each baud period. The point at which the logical level of mutually adjoining latch outputs varies from "1" to "0" is the phase information of said digital signals. The corresponding phase information is encoded to constitute the demodulated output.

Abstract: In an automatic gain control device which is connected to an output circuit (21, 22) supplied with a gain controlled signal to produce a timing signal in a receiver of a direct conversion type and which includes an amplifier (23, 24) for amplifying a received baseband signal into an amplified signal with a controllable gain, a d.c. blocking circuit (25, 26) for producing a variable level signal with the amplified signal exempted from a d.c. component, and a level detector (27, 28) for producing a level value signal by detecting level values of the variable level signal, a timing controller (31) is supplied with the timing signal to produce a first control signal in each of predetermined time slots in which a receiver input signal comprises bursts representative of an information signal. A second control signal is produced in an interval between two consecutive ones of the predetermined time slots.

Abstract: In a demodulator for demodulating into a demodulated signal a quadrature phase modulated signal having a large varying amplitude caused by various radio transmission link conditions, a preprocessing circuit (21) logarithmically processes the envelope to produce a first preprocessed signal having a logarithmically compressed and digitized amplitude and limits the amplitude to multiple values to produce a second preprocessed signal. A phase detecting circuit (22) detects a phase difference between a reference signal having a reference frequency and the second preprocessed signal and produces a phase difference signal representative of the phase difference. A processing circuit (23) processes the first preprocessed signal and the phase difference signal to produce first and second processed signals collectively as the demodulated signal.