Abstract: A level converting circuit converts a first signal which has an ECL level which is used in an ECL device into a second signal which has a GaAs logic level which is used in a GaAs device which is based on a GaAs substrate.

Abstract: A circuit has a level converting circuit for converting a signal having level in conformance with a first logic system into a signal having a level in conformance with a second logic system.

Abstract: A semiconductor integrated circuit includes an emitter-coupled logic circuit coupled between a first power source line and a second power source line. The emitter-coupled logic circuit has a differential circuit and an output buffer circuit. A wiring line is provided which is coupled to the emitter of a first transistor of the output buffer circuit and which carries an output signal of the emitter-coupled logic circuit to a circuit of the next stage. The semiconductor integrated circuit also includes a second transistor having an emitter coupled to the emitter of the first transistor, a collector coupled to the first power source line, and a base supplied with a second reference voltage, and a constant-current source coupled to the emitter of the first and second transistors and allowing a constant current to selectively pass through either the first transistor or the second transistor.

Abstract: A semiconductor integrated circuit includes a logic circuit which has first and second transistors constituting an emitter coupled transistor pair and a third transistor which is used as a constant current source, a bias circuit which includes a fourth transistor having an emitter from which a first predetermined voltage is supplied to a base of the third transistor and an impedance having one end coupled to a first power source and another end coupled to a base of the fourth transistor to supply a second predetermined voltage thereto, and a clamping circuit. The clamping circuit is OFF and does not perform a clamping operation with respect to the base of the fourth transistor when the entire semiconductor integrated circuit needs to operate. When the entire semiconductor integrated circuit does not need to operate, the clamping circuit is ON to clamp the base potential of the fourth transistor so as to reduce the power consumption of the semiconductor integrate circuit.

Abstract: A line driver circuit for driving a unit located a long distance away through a long transmission line, comprising an output stage having an emitter follower including transistors in which an output-stage transistor provides an output signal of a high potential or a low potential in response to the electric potential of an input signal. A discharge pass is connected to the base of the output-stage transistor, for drawing charges on the base of the output-stage transistor off thereof and thus shortening the fall time of the output waveform.

Abstract: A line driver circuit having a protective circuit against excess currents, which includes a protective transistor for limiting the output current of an output-stage emitter-follower transistor. A detecting means for detecting the output current of the emitter-follower transistor and a pull-up transistor for pulling up the base potential of the protective transistor are provided. Before the output current becomes too large, the detecting means detects the output current to turn on the pull-up transistor. Then the base potential of the protective transistor is pulled up to turn on the protective transistor. As a result the base current of the emitter-follower transistor is decreased, so that the emitter-follower transistor is protected from being thermally destroyed.