Patents by Inventor Hidekazu Okuhira

Hidekazu Okuhira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5744800
    Abstract: A transmission electron microscope makes it possible to search for defects without applying an undesirable treatment to a specimen by using a reference specimen prepared separately from a specimen to be observed. A pair of specimen holders detachable from the column of the electron microscope are adjacently arranged at upper and lower stages respectively along an electron beam axis to position the specimens closely to each other in an electron beam illuminating position. The pair of holders can be independently set to or removed from the electron beam illuminating position. The specimen holders include devices for selectively finely adjusting the spacing between the specimens, the angle of the specimen with respect to the electron beam axis and with respect to a plane perpendicular to the electron beam axis.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 28, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kakibayashi, Hisaya Murakoshi, Hidekazu Okuhira, Takashi Irie, Jiro Tokita, Keiichi Kanehori, Yasuhiro Mitsui
  • Patent number: 5401357
    Abstract: A method may be used to dry etch a sample including a plurality of regions different from each other in the photo-absorption of a light having a specified wavelength using an etching gas plasma. The method is capable of selectively etching the desired material from a plurality of materials having different types of band gap energies or from a plurality of materials having different band gap energies. The method includes a step of irradiating a light having the specified wavelength on the sample for reducing an etching rate of a region having a large photo-absorption coefficient to the light, thereby selectively etching a region having a small photo-absorption coefficient to the light.
    Type: Grant
    Filed: September 1, 1992
    Date of Patent: March 28, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hidekazu Okuhira, Tetsuo Ono, Susumu Hiraoka, Keizo Suzuki, Junji Shigeta, Hiroshi Masuda, Mitsuhiro Mori, Takuma Tanimoto, Shinichi Nakatsuka, Katsuhiko Mitani
  • Patent number: 5373191
    Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: December 13, 1994
    Assignee: Hitachi Ltd.
    Inventors: Toshiyuki Usagawa, Yoshinori Imamura, Hidekazu Okuhira, Shigeo Goto, Masayoshi Kobayashi, Shinichiro Takatani
  • Patent number: 5181087
    Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.
    Type: Grant
    Filed: April 19, 1989
    Date of Patent: January 19, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Usagawa, Yoshinori Imamura, Hidekazu Okuhira, Shigeo Goto, Masayoshi Kobayashi, Shinichiro Takatani
  • Patent number: 4936252
    Abstract: An equipment for manufacturing semiconductor devices has: a reaction chamber in which a substrate to be processed is placed; means for evacuating the reaction chamber; means for introducing a reaction gas into the reaction chamber; means for applying polarized light to the surface of the substrate for the purpose of depositing a thin film on the surface of the substrate using a photochemical reaction between the light and the reaction gas; and means for adjusting the direction of polarization of the light so as to be substantially perpendicular to the longitudinal axis of a stepped circuit pattern present on the surface of the substrate for the purpose of flattening the circuit pattern.
    Type: Grant
    Filed: April 11, 1988
    Date of Patent: June 26, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Yusuke Yajima, Hidekazu Okuhira, Kanji Tsujii, Seiichi Murayama, Akira Shintani, Yasuo Wada
  • Patent number: 4729964
    Abstract: First conductivity type impurity ions are implanted at a predetermined depth all over a region where impurity ions are to be implanted, and second conductivity type impurity ions are implanted in a dose about twice as large as that of the first conductivity type impurity ions at substantially the same implantation depth of the first conductivity type impurity ions, followed by annealing.In this way, mutually contiguous first and second conductivity type regions having substantially the same impurity concentrations and located at substantially the same depths are formed.
    Type: Grant
    Filed: April 15, 1986
    Date of Patent: March 8, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyoshi Natsuaki, Masao Tamura, Yasuo Wada, Kiyonori Ohyu, Tadashi Suzuki, Hidekazu Okuhira, Akira Shintani, Shoji Syukuri
  • Patent number: 4693779
    Abstract: A semiconductor device manufacturing apparatus is disclosed which comprises a reaction chamber; at least one light source for radiating light to a wafer disposed in the reaction chamber and performing plural processes by the photo-assisted reactions; a gas introducing means for introducing gaseous reactants into the reaction chamber; a gas exhausting means for exhausting the interior of the reaction chamber; and a light source for removing by light irradiation undesirable gaseous constituents which adhered to the wafer and the chamber inner wall in the preceding step. Since undesirable gaseous constituents adhered to the wafer and thereabouts can be removed, it is possible to effect plural processes for the wafer in the same chamber.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: September 15, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Hidekazu Okuhira, Yasuo Wada