Patents by Inventor Hidekazu Shibasaki

Hidekazu Shibasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6147824
    Abstract: A signal reproducing circuit includes first power supply lines having different potentials, a magneto-resistive effect head having one end thereof coupled to the first power supply line, for reproducing data recorded on a magnetic recording medium in a read operation, and a first constant current source coupled between another end of the magneto-resistive effect head and the second power supply line, for supplying the magneto-resistive effect head with a sense current in the read operaion. Also included are first and second transistors having collectors thereof coupled to the first power supply line, respectively, and responsive to voltage signals obtained from the one end and the other end of the magneto-resistive effect head.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: November 14, 2000
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Shibasaki, Hiroaki Ueno
  • Patent number: 6118611
    Abstract: A signal reproducing circuit for a magneto-resistive effect head includes a constant current source for supplying a sense current to an MR head in a read state, first constant current sources for supplying first constant currents to a pair of reproduction transistors in the read state, and a capacitor connected between the emitters of the transistors. Furthermore, second constant current sources for supplying second constant currents are connected in parallel with the first constant current sources. Control is given so that when switching an idle state to the read state is commanded, the second constant current sources remain on for a given period of time. Owing to this circuitry, a transient period during which the idle state is switched to the read state or a transient period during which heads are switched in the read state can be shortened to a great extent.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: September 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Shibasaki, Hiroaki Ueno, Ken Yakuwa
  • Patent number: 5978164
    Abstract: A signal reproducing circuit includes a magneto-resistive effect head having one end thereof coupled to a first power supply line, for reproducing data recorded on a magnetic recording medium in a read operation. A first constant current source is coupled between another end of the head and a second power supply line, for supplying the head with a sense current in the read operation. First and second transistors have collectors thereof coupled to the first power supply line, and are responsive to voltage signals obtained from both ends of the head, respectively. Second and third constant current sources are coupled between each emitter of the first and second transistors and the second power supply line, respectively, for supplying the first and second transistors with a predetermined constant current in the read operation. A capacitor is connected between each emitter of the first and second transistors.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: November 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Shibasaki, Hiroaki Ueno
  • Patent number: 5623378
    Abstract: A signal reproducing circuit includes: a magneto-resistive effect head having one end thereof coupled to a first power supply line, for reproducing data recorded on a magnetic recording medium in a read operation; a first constant current source coupled between another end of the head and a second power supply line, for supplying the head with a sense current in the read operation; first and second transistors having collectors thereof coupled to the first power supply line, and responsive to voltage signals obtained from both ends of the head; second and third constant current sources coupled between each emitter of the first and second transistors and the second power supply line, for supplying the first and second transistors with a predetermined constant current in the read operation; a capacitor connected between each emitter of the first and second transistors; and a control circuit responsive to a read/write control signal, for controlling respective ON/OFF timings of the first to third constant curren
    Type: Grant
    Filed: September 14, 1994
    Date of Patent: April 22, 1997
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Shibasaki, Hiroaki Ueno