Patents by Inventor Hidekazu TANISAWA

Hidekazu TANISAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11462449
    Abstract: A semiconductor device includes a semiconductor chip provided inside with a p-n junction, an opaque sealing resin covering a surface of the semiconductor chip, and a functional region arranged between the semiconductor chip and the sealing resin and configured to prevent light, which is generated when a forward current flows through the p-n junction and has a particular wavelength causing deterioration of the sealing resin, from reaching the sealing resin.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: October 4, 2022
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Hiroshi Sato, Yoshinori Murakami, Hidekazu Tanisawa, Shinji Sato, Fumiki Kato, Kazuhiro Mitamura, Yui Takahashi
  • Publication number: 20220044980
    Abstract: A semiconductor device includes a semiconductor chip provided inside with a p-n junction, an opaque sealing resin covering a surface of the semiconductor chip, and a functional region arranged between the semiconductor chip and the sealing resin and configured to prevent light, which is generated when a forward current flows through the p-n junction and has a particular wavelength causing deterioration of the sealing resin, from reaching the sealing resin.
    Type: Application
    Filed: December 26, 2018
    Publication date: February 10, 2022
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Hiroshi SATO, Yoshinori MURAKAMI, Hidekazu TANISAWA, Shinji SATO, Fumiki KATO, Kazuhiro MITAMURA, Yui TAKAHASHI
  • Patent number: 10461050
    Abstract: An object of the present invention is to stabilize and strengthen the strength of a bonding part between a metal electrode on a semiconductor chip and metal wiring connected thereto using a simple structure. Provided is a semiconductor device including a metal layer 130 on a surface of a metal electrode 120 formed on a semiconductor chip 110, the metal layer 130 consisting of a metal or an alloy different from a constituent metal of the metal electrode 120, metal wiring 140 is connected to the metal layer 130 via a bonding part 150, wherein the constituent metal of the metal layer 130 is a metal or an alloy different from the constituent metal of the metal electrode 120, and the bonding part 150 has an alloy region harder than the metal wiring 140.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: October 29, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hidekazu Tanisawa, Shinji Sato, Fumiki Kato, Hiroshi Sato, Kenichi Koui, Hiroki Takahashi, Yoshinori Murakami
  • Publication number: 20180114765
    Abstract: An object of the present invention is to stabilize and strengthen the strength of a bonding part between a metal electrode on a semiconductor chip and metal wiring connected thereto using a simple structure. Provided is a semiconductor device including a metal layer 130 on a surface of a metal electrode 120 formed on a semiconductor chip 110, the metal layer 130 consisting of a metal or an alloy different from a constituent metal of the metal electrode 120, metal wiring 140 is connected to the metal layer 130 via a bonding part 150, wherein the constituent metal of the metal layer 130 is a metal or an alloy different from the constituent metal of the metal electrode 120, and the bonding part 150 has an alloy region harder than the metal wiring 140.
    Type: Application
    Filed: October 19, 2017
    Publication date: April 26, 2018
    Inventors: Hidekazu Tanisawa, Shinji Sato, Fumiki Kato, Hiroshi Sato, Kenichi Koui, Hiroki Takahashi, Yoshinori Murakami
  • Patent number: 9698082
    Abstract: A semiconductor device according to the present invention, having an Au-based solder layer (3) sandwiched between a semiconductor element (1) and a Cu substrate (2) made mainly of Cu, in which the semiconductor device includes: a dense metal film (23) which is arranged between the Cu substrate (2) and the Au-based solder layer (3), and has fine slits (24) patterned to have a predetermined shape in a plan view; and fine structures (4) with dumbbell-like cross section, which have Cu and Au as main elements, and are each buried in the Cu substrate (2), the Au-based solder layer (3), and the fine slits (24) of the dense metal film (23).
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: July 4, 2017
    Assignees: NISSAN MOTOR CO., LTD., SANKEN ELECTRIC CO., LTD., FUJI ELECTRIC CO., LTD.
    Inventors: Satoshi Tanimoto, Shinji Sato, Hidekazu Tanisawa, Kohei Matsui
  • Publication number: 20160293522
    Abstract: A semiconductor device according to the present invention, having an Au-based solder layer (3) sandwiched between a semiconductor element (1) and a Cu substrate (2) made mainly of Cu, in which the semiconductor device includes: a dense metal film (23) which is arranged between the Cu substrate (2) and the Au-based solder layer (3), and has fine slits (24) patterned to have a predetermined shape in a plan view; and fine structures (4) with dumbbell-like cross section, which have Cu and Au as main elements, and are each buried in the Cu substrate (2), the Au-based solder layer (3), and the fine slits (24) of the dense metal film (23).
    Type: Application
    Filed: November 13, 2013
    Publication date: October 6, 2016
    Applicants: NISSAN MOTOR CO., LTD., SANKEN ELECTRIC CO., LTD., FUJI ELECTRIC CO., LTD.
    Inventors: Satoshi TANIMOTO, Shinji SATO, Hidekazu TANISAWA, Kohei MATSUI