Patents by Inventor Hideki Akahori

Hideki Akahori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162018
    Abstract: The adhesiveness of a treatment target made of a fluorine-based hard-to-adhere material is improved. A process gas containing any one or two or more among carbon monoxide, carbon dioxide, hydrogen, water vapor, ethanol, propanol, hexanol, ethylene glycol, and ammonia is supplied from a process gas supply unit 10 to a plasma generation unit 20. In the plasma generation unit 20, the process gas is activated by plasma and is brought into contact with a treatment target 9, and through a reaction caused by the contact, the residual ratio of fluorine atoms on a surface of the treatment target 9 is adjusted to 60% or less of that before the contact, and any one among a carbon atom, a hydrogen atom, and an oxygen atom, or a molecule containing one or more of these atoms is provided to the surface of the treatment target.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 16, 2024
    Applicant: SEKISUI CHEMICAL CO., LTD.
    Inventors: Eiji MIYAMOTO, Masato AKAHORI, Hideki KONDO, Mamoru HINO
  • Patent number: 8278750
    Abstract: A heat conduction board, include a heat dissipation member; a heat conduction member which is arranged on the heat dissipation member and conducts a heat thereto; a lead frame which is formed in a wire pattern shape, and is arranged on the heat conduction member; and a printed circuit board which mounts a second electronic component for controlling a first electronic component; wherein the first electronic component and the printed circuit board are soldered to the lead frame.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: October 2, 2012
    Assignee: NEC Access Technica, Ltd
    Inventor: Hideki Akahori
  • Patent number: 8094107
    Abstract: A liquid crystal display (LCD) driver integrated circuit (IC) includes a grayscale voltage generating circuit generating grayscale voltages from a set of supply reference voltages. A converting section having connection terminals drives each of data lines of an LCD display panel through one of the connection terminals based on one of the grayscale voltages. The grayscale voltage generating circuit includes a resistance circuit having resistances connected in series and voltage buffers connected to the resistance circuit to bias the resistance circuit. When two of the LCD driver ICs are used, non-inversion input terminals of pairs of the voltage buffers in a first of the two LCD driver ICs and a corresponding voltage buffer in the second LCD driver IC are commonly connected to the reference voltage generating circuit, and connection terminals in the first LCD driver IC are connected to connection terminals in the second LCD driver IC.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: January 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kouichi Nishimura, Takanori Sumiya, Hideki Akahori
  • Publication number: 20110116236
    Abstract: A heat conduction board, include a heat dissipation member; a heat conduction member which is arranged on the heat dissipation member and conducts a heat thereto; a lead frame which is formed in a wire pattern shape, and is arranged on the heat conduction member; and a printed circuit board which mounts a second electronic component for controlling a first electronic component; wherein the first electronic component and the printed circuit board are soldered to the lead frame.
    Type: Application
    Filed: June 22, 2010
    Publication date: May 19, 2011
    Inventor: HIDEKI AKAHORI
  • Patent number: 7339582
    Abstract: A display device disclosed herein prevents timing misalignment between signals of clock, data, and start pulses to be supplied to driver ICs. The display device comprises a controller, driver ICs and other components and each driver IC is configured to receive clock, data, and start pulses output from the controller, supply the received clock, data, and start pulses to a switch through parallel paths without routing the signals through its internal circuit, and supply the received clock, data, and start pulses to output terminals via the switch.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: March 4, 2008
    Assignee: NEC Electronics Corportion
    Inventor: Hideki Akahori
  • Publication number: 20070247409
    Abstract: A liquid crystal display (LCD) driver integrated circuit includes a grayscale voltage generating circuit configured to generate a plurality of grayscale voltages from a set of supply reference voltages; and a converting section having connection terminals and configured to drive each of a plurality of data lines of a liquid crystal display panel through one of the connection terminals based on one of the plurality of grayscale voltages which is determined based on an input data, when each of a plurality of scanning lines of the liquid crystal display panel is driven. The grayscale voltage generating circuit includes a resistance circuit having resistances connected in series; and a plurality of voltage buffers connected to the resistance circuit to bias the resistance circuit.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 25, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Kouichi Nishimura, Takanori Sumiya, Hideki Akahori
  • Patent number: 7170505
    Abstract: To prevent a timing shift of a clock and data supplied to a driver IC. A driver 1011 includes a phase adjustment circuit 201 for receiving via input terminals a clock and data outputted from a controller 103, latching received data with the clock adjusted to a 50-percent duty ratio, and outputting as phase-adjusted signals the data having the latched data further latched by synchronizing it with a delay clock having the duty-ratio-adjusted clock delayed by (?/2) and the clock of the 50-percent duty ratio.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: January 30, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Hideki Akahori
  • Publication number: 20050012705
    Abstract: A display device disclosed herein prevents timing misalignment between signals of clock, data, and start pulses to be supplied to driver ICs. The display device comprises a controller, driver ICs and other components and each driver IC is configured to receive clock, data, and start pulses output from the controller, supply the received clock, data, and start pulses to a switch through parallel paths without routing the signals through its internal circuit, and supply the received clock, data, and start pulses to output terminals via the switch.
    Type: Application
    Filed: January 29, 2004
    Publication date: January 20, 2005
    Inventor: Hideki Akahori
  • Publication number: 20040183794
    Abstract: To prevent a timing shift of a clock and data supplied to a driver IC.
    Type: Application
    Filed: January 27, 2004
    Publication date: September 23, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Hideki Akahori