Patents by Inventor Hideki Fujikake

Hideki Fujikake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050242377
    Abstract: A semiconductor device and a method for manufacturing the same and method for deleting information in use of the semiconductor device, in which field shield isolation or a trench type isolation between elements is used with suppression of penetration of field oxide into element active region of the device, that is, a defect involved in conventional LOGOS type process, are disclosed. A non-LOCOS insulating device isolation block is formed in a semiconductor substrate. The non-LOCOS insulating device isolation block uses a field shield element isolation structure or trench type element isolation structure.
    Type: Application
    Filed: June 30, 2005
    Publication date: November 3, 2005
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kohei Eguchi, Yuichi Egawa, Shoichi Iwasa, Hideki Fujikake, Wataru Yokozeki, Tatsuya Kawamata
  • Patent number: 6917076
    Abstract: A semiconductor device and a method for manufacturing the same and method for deleting information in use of the semiconductor device, in which field shield isolation or a trench type isolation between elements is used with suppression of penetration of field oxide into element active region of the device, that is, a defect involved in conventional LOCOS type process, are disclosed. A non-LOCOS insulating device isolation block is formed in a semiconductor substrate. The non-LOCOS insulating device isolation block uses a field shield element isolation structure or trench type element isolation structure.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: July 12, 2005
    Assignee: United Microelectronics Corporation
    Inventors: Kohei Eguchi, Yuichi Egawa, Shoichi Iwasa, Hideki Fujikake, Wataru Yokozeki, Tatsuya Kawamata
  • Publication number: 20040021160
    Abstract: A semiconductor device and a method for manufacturing the same and method for deleting information in use of the semiconductor device, in which field shield isolation or a trench type isolation between elements is used with suppression of penetration of field oxide into element active region of the device, that is, a defect involved in conventional LOCOS type process, are disclosed. A non-LOCOS insulating device isolation block is formed in a semiconductor substrate. The non-LOCOS insulating device isolation block uses a field shield element isolation structure or trench type element isolation structure.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 5, 2004
    Inventors: Kohei Eguchi, Yuichi Egawa, Shoichi Iwasa, Hideki Fujikake, Wataru Yokozeki, Tatsuya Kawamata
  • Patent number: 6657229
    Abstract: A semiconductor device has field shield isolation or trench type isolation between elements which suppresses penetration of field oxide into an element active region of the device. A common gate is located between two MOS transistors, which may be of opposite conductivity type. After gate electrode wiring layers are formed in a field region and an active region to the same level, a pad polysilicon film formed on the entire surface to cover the patterns of these gate electrode wiring layers, which are in separated patterns.
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: December 2, 2003
    Assignee: United Microelectronics Corporation
    Inventors: Kohei Eguchi, Yuichi Egawa, Shoichi Iwasa, Hideki Fujikake, Wataru Yokozeki, Tatsuya Kawamata
  • Patent number: 6501148
    Abstract: A semiconductor device includes a semiconductor substrate in which a trench for element isolation is formed, and an element isolation oxide film buried into the trench in such a manner that the element isolation oxide film is projected from the surface of the semiconductor substrate. The element isolation oxide film which is an element isolation insulating film for defining an element forming region on the semiconductor substrate has a projection portion above the surface of the semiconductor substrate. The projection portion has the width wider than that of the trench. The projection portion and a contact portion made in contact with the semiconductor substrate within the trench are made of thermal oxide films, and a portion other than the projection portion and the contact portion is made of a CVD dioxide film.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: December 31, 2002
    Assignee: United Microelectronics Corporation
    Inventors: Nobuyuki Tsuda, Hideki Fujikake
  • Publication number: 20020053709
    Abstract: A semiconductor device includes a semiconductor substrate in which a trench for element isolation is formed, and an element isolation oxide film buried into the trench in such a manner that the element isolation oxide film is projected from the surface of the semiconductor substrate. The element isolation oxide film which is an element isolation insulating film for defining an element forming region on the semiconductor substrate has a projection portion above the surface of the semiconductor substrate. The projection portion has the width wider than that of the trench. The projection portion and a contact portion made in contact with the semiconductor substrate within the trench are made of thermal oxide films, and a portion other than the projection portion and the contact portion is made of a CVD dioxide film.
    Type: Application
    Filed: December 20, 1999
    Publication date: May 9, 2002
    Inventors: NOBUYUKI TSUDA, HIDEKI FUJIKAKE
  • Patent number: 6143623
    Abstract: A semiconductor device includes a semiconductor substrate in which a trench for element isolation is formed, and an element isolation oxide film buried into the trench in such a manner that the element isolation oxide film is projected from the surface of the semiconductor substrate. The element isolation oxide film which is an element isolation insulating film for defining an element forming region on the semiconductor substrate has a projection portion above the surface of the semiconductor substrate. The projection portion has the width wider than that of the trench. The projection portion and a contact portion made in contact with the semiconductor substrate within the trench are made of thermal oxide films, and a portion other than the projection portion and the contact portion is made of a CVD dioxide film.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: November 7, 2000
    Assignee: Nippon Steel Corporation
    Inventors: Nobuyuki Tsuda, Hideki Fujikake
  • Patent number: 6020622
    Abstract: A semiconductor device includes a semiconductor substrate in which a trench for element isolation is formed, and an element isolation oxide film buried into the trench in such a manner that the element isolation oxide film is projected from the surface of the semiconductor substrate. The element isolation oxide film which is an element isolation insulating film for defining an element forming region on the semiconductor substrate has a projection portion above the surface of the semiconductor substrate. The projection portion has the width wider than that of the trench. The projection portion and a contact portion made in contact with the semiconductor substrate within the trench are made of thermal oxide films, and a portion other than the projection portion and the contact portion is made of a CVD dioxide film.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: February 1, 2000
    Assignee: United Microelectronics Corporation
    Inventors: Nobuyuki Tsuda, Hideki Fujikake
  • Patent number: 5762813
    Abstract: By using first mixed gas containing carbon atoms and fluorine atoms, a semiconductor substrate is etched. In order to remove a damage layer formed on the surface of the semiconductor substrate by this etching processing, the semiconductor substrate is etched by second mixed gas including gas containing fluorine atoms and oxygen gas having a partial pressure ratio of at least 70%. Thereafter, a semiconductor oxide film is formed on the semiconductor substrate to fabricate a semiconductor device.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: June 9, 1998
    Assignee: Nippon Steel Corporation
    Inventors: Makoto Takiyama, Hideki Fujikake