Patents by Inventor Hideki Hosokawa
Hideki Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240121868Abstract: A microwave processing device of the present disclosure is provided with a heating chamber, a microwave generating unit, an amplifying unit, a power supply unit, a detecting unit, a control unit, and a storage unit. The microwave generating unit generates microwave having an optional frequency in a predetermined frequency band. The amplifying unit amplifies an output level of the microwave. The power supply unit radiates the microwave amplified by the amplifying unit into the heating chamber as incident electric power. The detecting unit detects reflected electric power, which returns to the power supply unit from the heating chamber, from among the incident electric power. The control unit controls the microwave generating unit and the amplifying unit. The storage unit stores a value of the reflected electric power, together with a frequency of the microwave and an elapsed time from the start of heating.Type: ApplicationFiled: January 24, 2022Publication date: April 11, 2024Inventors: DAISUKE HOSOKAWA, YOSHIHARU OOMORI, HIDEKI NAKAMURA, KAZUKI MAEDA, TAKASHI UNO
-
Patent number: 8008948Abstract: A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.Type: GrantFiled: December 11, 2007Date of Patent: August 30, 2011Assignee: DENSO CORPORATIONInventors: Yasuaki Makino, Hiroshi Okada, Reiji Iwamoto, Nobukazu Oba, Shinji Nakatani, Norikazu Ohta, Hideki Hosokawa
-
Publication number: 20090002033Abstract: The present invention reliably removes a signal change associated with a noise component from a comparison signal of a comparator. A comparator circuit includes a comparator and a timer circuit. After a reversal of the comparison signal, if the level of the comparator is sustained at least from a first time to a second time, an output signal is reversed and output. The timer circuit includes a memory unit that is shifted to a memory state in which the reversal of the comparison signal is stored at the first time if the reversal is verified. If the comparison signal is reversed during the interval between the first time and second time, the memory state is cleared.Type: ApplicationFiled: June 26, 2008Publication date: January 1, 2009Applicant: DENSO CORPORATIONInventors: Shinji Nakatani, Nobukazu Oba, Norikazu Ohta, Hideki Hosokawa
-
Publication number: 20080211544Abstract: A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.Type: ApplicationFiled: December 11, 2007Publication date: September 4, 2008Applicant: DENSO CORPORATIONInventors: Yasuaki Makino, Hiroshi Okada, Reiji Iwamoto, Nobukazu Oba, Shinji Nakatani, Norikazu Ohta, Hideki Hosokawa
-
Publication number: 20080048641Abstract: A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.Type: ApplicationFiled: July 3, 2007Publication date: February 28, 2008Applicant: DENSO CORPORATIONInventors: Yasuaki Makino, Hiroshi Okada, Reiji Iwamoto, Norikazu Ohta, Hideki Hosokawa
-
Publication number: 20070285291Abstract: A binarization circuit for binarizing a pulsative analog signal includes: a first comparator circuit for reversing an output signal when the analog signal becomes smaller than a threshold voltage and when the analog signal becomes larger than a high side threshold voltage; a second comparator circuit for reversing an output signal when the analog signal becomes larger than the threshold voltage and when the analog signal becomes smaller than a low side threshold voltage; and a selector circuit for inputting the output signals from the first and second comparator circuits and for reversing an output signal when the analog signal becomes smaller than the threshold voltage and when the analog signal becomes larger than the threshold voltage.Type: ApplicationFiled: March 13, 2007Publication date: December 13, 2007Applicant: DENSO CORPORATIONInventors: Yasuaki Makino, Susumu Kuroyanagi, Shinji Nakatani, Reiji Iwamoto, Hideki Hosokawa, Norikazu Ohta
-
Patent number: 6960485Abstract: A process of forming separation grooves for separating a semiconductor wafer into individual light-emitting devices, a process for thinning the substrate, process for adhering the wafer to the adhesive sheet to expose a substrate surface on the reverse or backside of the wafer, a scribing process for forming split lines in the substrate for dividing the wafer into light-emitting devices, and a process of forming a mirror structure comprising a light transmission layer, a reflective layer, and a corrosion-resistant layer, which are laminated in sequence using sputtering or deposition processes. Because the light transmission layer is laminated on the adhesive sheet, gases normally volatilized from the adhesion materials are sealed and do not chemically combine with the metal being deposited as the reflective layer. As a result, reflectivity of the reflective layer can be maintained.Type: GrantFiled: February 28, 2003Date of Patent: November 1, 2005Assignee: Toyoda Gosei Co., Ltd.Inventors: Toshiya Uemura, Naohisa Nagasaka, Masaki Hashimura, Atsuo Hirano, Hiroshi Tadano, Tetsu Kachi, Hideki Hosokawa
-
Publication number: 20050133799Abstract: A process of forming separation grooves for separating a semiconductor wafer into individual light-emitting devices, a process for thinning the substrate, process for adhering the wafer to the adhesive sheet to expose a substrate surface on the reverse or backside of the wafer, a scribing process for forming split lines in the substrate for dividing the wafer into light-emitting devices, and a process of forming a mirror structure comprising a light transmission layer, a reflective layer, and a corrosion-resistant layer, which are laminated in sequence using sputtering or deposition processes. Because the light transmission layer is laminated on the adhesive sheet, gases normally volatilized from the adhesion materials are sealed and do not chemically combine with the metal being deposited as the reflective layer. As a result, reflectivity of the reflective layer can be maintained.Type: ApplicationFiled: January 13, 2005Publication date: June 23, 2005Applicant: TOYODA GOSEI CO., LTD.Inventors: Toshiya Uemura, Naohisa Nagasaka, Masaki Hashimura, Atsuo Hirano, Hiroshi Tadano, Tetsu Kachi, Hideki Hosokawa
-
Publication number: 20030151058Abstract: A process of forming separation grooves for separating a semiconductor wafer into individual light-emitting devices, a process for thinning the substrate, process for adhering the wafer to the adhesive sheet to expose a substrate surface on the reverse or backside of the wafer, a scribing process for forming split lines in the substrate for dividing the wafer into light-emitting devices, and a process of forming a mirror structure comprising a light transmission layer, a reflective layer, and a corrosion-resistant layer, which are laminated in sequence using sputtering or deposition processes. Because the light transmission layer is laminated on the adhesive sheet, gases normally volatilized from the adhesion materials are sealed and do not chemically combine with the metal being deposited as the reflective layer. As a result, reflectivity of the reflective layer can be maintained.Type: ApplicationFiled: February 28, 2003Publication date: August 14, 2003Inventors: Toshiya Uemura, Naohisa Nagasaka, Masaki Hashimura, Atsuo Hirano, Hiroshi Tadano, Tetsu Kachi, Hideki Hosokawa
-
Publication number: 20010028062Abstract: A process of forming separation grooves for separating a semiconductor wafer into individual light-emitting devices, a process for thinning the substrate, process for adhering the wafer to the adhesive sheet to expose a substrate surface on the reverse or backside of the wafer, a scribing process for forming split lines in the substrate for dividing the wafer into light-emitting devices, and a process of forming a mirror structure comprising a light transmission layer, a reflective layer, and a corrosion-resistant layer, which are laminated in sequence using sputtering or deposition processes. Because the light transmission layer is laminated on the adhesive sheet, gases normally volatilized from the adhesion materials are sealed and do not chemically combine with the metal being deposited as the reflective layer. As a result, reflectivity of the reflective layer can be maintained.Type: ApplicationFiled: March 29, 2001Publication date: October 11, 2001Inventors: Toshiya Uemura, Naohisa Nagasaka, Masaki Hashimura, Atsuo Hirano, Hiroshi Tadano, Tetsu Kachi, Hideki Hosokawa
-
Patent number: 4809654Abstract: A ceramic precombustion chamber construction of an internal combustion engine includes at least one ceramic body having a circular cross-section, a metal ring in which the ceramic body is fixed by shrinkage fitting, and at least one key interposed between the ceramic body and the metal ring for preventing rotation therebetween. Contour lines of a key receiving notch formed in an inner circumference of the metal ring are positioned on inner sides of contour lines of a key receiving notch formed in an outer circumference of the ceramic body. With the arrangement, the ceramic body is prevented from loosening from the fitting with the metal ring due to heat and vibration in use and is prevented from being damaged resulting from cracks occurring in the ceramic body.Type: GrantFiled: October 1, 1987Date of Patent: March 7, 1989Assignee: NGK Insulators, Ltd.Inventors: Takayuki Ogasawara, Akinori Wakasa, Hideki Hosokawa, Minoru Machida, Itsuo Kondo