Patents by Inventor Hideki Ichioka

Hideki Ichioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030048261
    Abstract: Input position is accurately detected not depending on electrode scanning. In an x-detection period of a non-display period, a source drive circuit 3 simultaneously applies to all signal wiring lines a pulse of a peak value proportional to a distance from a gate drive circuit 2. A coordinate detection circuit 8 obtains an x-coordinate on the basis of a voltage induced at a pen 7 corresponding to the peak value (x-coordinate) of the applied pulse. In a y-detection period, a pulse generation circuit 5 applies one pulse to a common line. The pen 7 detects a potential variation in amplitude proportional to a distance (y-coordinate) from the source drive circuit 3, generated approximately simultaneously on all the signal wiring lines via a capacitance. The coordinate detection circuit 8 obtains the y-coordinate similarly to the case of x-coordinate detection. Thus, the input position is detected in a very short time scanning neither the scanning lines nor the signal wiring lines.
    Type: Application
    Filed: September 11, 2002
    Publication date: March 13, 2003
    Inventors: Tomohiko Yamamoto, Koji Fujiwara, Keiichi Tanaka, Naoto Inoue, Hideki Ichioka
  • Patent number: 6504521
    Abstract: As a method of driving a liquid crystal display device, the average voltage of reference line drive voltages Vcom for AC-driving a liquid crystal is set higher than the average voltage of signal line drive voltage V0. Moreover, when displaying a plurality of gray scales, the respective voltages are set so that the average voltage of the signal line drive voltages is lowered with a decrease in a voltage difference to be applied to the liquid crystal as an absolute value. In a liquid crystal display device of an opposing signal line structure, a high-quality image display is achieved by compensating for the non-symmetry of the transmissivity of the liquid crystal with respect to positive and negative drive voltages to prevent flickering and image persistence.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: January 7, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoto Inoue, Tomohiko Yamamoto, Keiichi Tanaka, Koji Fujiwara, Hideki Ichioka
  • Publication number: 20020171615
    Abstract: As a method of driving a liquid crystal display device, the average voltage of reference line drive voltages Vcom for AC-driving a liquid crystal is set higher than the average voltage of signal line drive voltage V0. Moreover, when displaying a plurality of gray scales, the respective voltages are set so that the average voltage of the signal line drive voltages is lowered with a decrease in a voltage difference to be applied to the liquid crystal as an absolute value. In a liquid crystal display device of an opposing signal line structure, a high-quality image display is achieved by compensating for the non-symmetry of the transmissivity of the liquid crystal with respect to positive and negative drive voltages to prevent flickering and image persistence.
    Type: Application
    Filed: June 12, 2002
    Publication date: November 21, 2002
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Naoto Inoue, Tomohiko Yamamoto, Keiichi Tanaka, Koji Fujiwara, Hideki Ichioka
  • Publication number: 20020171797
    Abstract: A liquid crystal display device has a liquid crystal layer between a glass substrate and a counter substrate. A TFT and scanning lines which control the TFT are provided on the glass substrate. On the counter substrate, a gradation signal line which is connected to a counter electrode applying a voltage to the liquid crystal layer is provided opposite to the scanning lines. A sealing section for sealing the liquid crystal of the liquid crystal layer is provided while enclosing the display area between the glass substrate and the counter substrate. The sealing section has conductive particles. Upper contact pads connected to the gradation signal lines and lower contact pads on the glass substrate are electrically connected via the conductive particles. This realizes a liquid crystal display device with a smaller frame and makes the mounting compact in size without causing poor connection due to line breakage.
    Type: Application
    Filed: March 6, 2002
    Publication date: November 21, 2002
    Inventors: Hideki Ichioka, Tomohiko Yamamoto, Naoto Inoue, Keiichi Tanaka, Koji Fujiwara
  • Patent number: 6433765
    Abstract: A liquid crystal display in which a reference signal main line, placed so as to connect reference signal lines to each other, is separated into an input main line and an output main line in an insulating state from each other. Then, a voltage application line from a voltage-application circuit for controlling the voltage of a reference signal is connected to the input main line and a voltage feedback line therefrom is connected to the output main line. Thus, it becomes possible to accurately detect minute voltage variations within a reference signal circuit and compensate for them.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: August 13, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kouji Fujiwara, Tomohiko Yamamoto, Keiichi Tanaka, Naoto Inoue, Hideki Ichioka, Hisao Okada
  • Publication number: 20020089813
    Abstract: An electronic device includes on a substrate: a plurality of first capacitors each including a first electrode and a second electrode opposing the first electrode via a first dielectric layer; a plurality of second capacitors each including a third electrode electrically connected to the first electrode and a fourth electrode opposing the third electrode via a second dielectric layer; a first line whose electrical connection to the first electrode and the third electrode is turned ON/OFF by a first switching element; a second line electrically connected to the second electrode at least temporarily; a third line whose electrical connection to the fourth electrode is turned ON/OFF by a second switching element; and a fourth line whose electrical connection to the fourth electrode is turned ON/OFF by a third switching element.
    Type: Application
    Filed: December 20, 2001
    Publication date: July 11, 2002
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tomohiko Yamamoto, Keiichi Tanaka, Hideki Ichioka, Naoto Inoue, Koji Fujiwara
  • Patent number: 6404477
    Abstract: An object of the present invention is to provide an active matrix type liquid crystal display apparatus, capable of being upsized and having enhanced resolution at low cost without being degraded in display quality. In the liquid crystal display apparatus, on a pixel substrate, scanning lines and reference signal lines are formed in a row direction, and on a counter substrate, gradation signal lines are formed in a column direction. A liquid crystal layer is sandwiched between the pixel substrate and the counter substrate. Outside an image display region, a reference signal transfer pad is disposed on the counter substrate opposite to a main reference signal line for connecting end portions of reference signal lines. The reference signal transfer pad and the main reference signal line are electrically connected by conductive material.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: June 11, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kouji Fujiwara, Tomohiko Yamamoto, Keiichi Tanaka, Naoto Inoue, Hideki Ichioka
  • Patent number: 6388646
    Abstract: It is an object of the invention to reduce a leakage low-frequency electric field from a panel section of a matrix type. In the case where a panel section has a usual current structure in which the panel section has a single common electrode elongating over the whole of the display region of the panel section, the maximum voltage difference of a reference signal supplied to the common electrode is defined to be 0.3678×x−0.6136 (wherein x is the area of the display region) or less. In the case where the panel section has the so-called counter source structure and a plurality of column electrodes, the maximum voltage difference of a reference signal supplied to the column electrodes is defined to be ax−b (wherein a=0.3565×y−0.6829, b=−0.0937y+0.7091, and y is a ratio of the area of all the column electrodes to the area of the display region) or less.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: May 14, 2002
    Assignee: Shapr Kabushiki Kaisha
    Inventors: Koji Fujiwara, Tomohiko Yamamoto, Keiichi Tanaka, Naoto Inoue, Hideki Ichioka
  • Publication number: 20020008688
    Abstract: In an image display device which employs pulse width modulation driving, a voltage which is less than a voltage supplied to signal lines is applied to pixel electrodes. Tones are displayed by shifting phases of waveforms of the signal lines and scanning lines, and polarities of pixels in a signal line direction are inverted alternately. This prevents increase in power consumption which is caused by pulse intervals which become too small at high tone levels, in addition to preventing change in tone level due to external factors such as temperature, or signal delays in a driver or wiring.
    Type: Application
    Filed: April 10, 2001
    Publication date: January 24, 2002
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tomohiko Yamamoto, Hisashi Nagata, Youji Yoshimura, Noboru Noguchi, Hideki Ichioka, Koji Fujiwara, Naoto Inoue, Keiichi Tanaka