Patents by Inventor Hideki Kamitsuna
Hideki Kamitsuna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230350135Abstract: An optical fiber termination structure including: a hollow-core optical fiber that includes a hollow portion through which light is transmitted; a light transmissive member that covers the hollow portion; and an antireflection mechanism that prevents reflection of the light passing through the light transmissive member. An example of the antireflection mechanism is a plate glass with an antireflection coating applied to both faces thereof. The thickness of the plate glass is preferably 100 µm or less. The plate glass is bonded to the end of the hollow-core optical fiber by a jig. An optical connection component is a component in which two plate glasses face each other.Type: ApplicationFiled: August 17, 2021Publication date: November 2, 2023Inventors: Hideki KAMITSUNA, Ryo NAGASE
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Patent number: 11327258Abstract: This optical module comprises a stem; lead pins extending through the stem; glasses filled between the stem and the lead pins; elements (photodiode, amplifier) disposed on a first main surface of the stem, and connected to the lead pins; FPC in contact with a second main surface of the stem; a cap attachable to the stem; and an aligning-fixing parts (metal-made flange, Z-sleeve) that aligns an optical fiber stub with the cap and fix the optical fiber stub to the cap.Type: GrantFiled: July 11, 2017Date of Patent: May 10, 2022Assignee: YOKOWO CO., LTD.Inventors: Hideki Kamitsuna, Akira Ohki
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Publication number: 20200292764Abstract: This optical module comprises a stem; lead pins extending through the stem; glasses filled between the stem and the lead pins; elements (photodiode, amplifier) disposed on a first main surface of the stem, and connected to the lead pins; FPC in contact with a second main surface of the stem; a cap attachable to the stem; and an aligning-fixing parts (metal-made flange, Z-sleeve) that aligns an optical fiber stub with the cap and fix the optical fiber stub to the cap.Type: ApplicationFiled: July 11, 2017Publication date: September 17, 2020Applicant: Yokowo Co., Ltd.Inventors: Hideki KAMITSUNA, Akira OHKI
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Patent number: 10551570Abstract: A plug of a connector that performs optical transmission is provided with an optical connection unit. The optical connection unit includes a lens that is provided on a side surface of the optical connection unit and performs optical connection with a lens provided on an optical connection unit of a receptacle in a direction orthogonal to an inserting/removing direction of the plug, and a locating surface that is provided on the side surface of the optical connection unit and abuts on a locating surface of the receptacle to determine a position of the optical connection unit in a mating condition of the plug into the receptacle.Type: GrantFiled: October 2, 2015Date of Patent: February 4, 2020Assignee: YOKOWO CO., LTD.Inventors: Akihiro Yodogawa, Hideki Kamitsuna, Ryo Nagase
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Publication number: 20180011256Abstract: A plug of a connector that performs optical transmission is provided with an optical connection unit. The optical connection unit includes a lens that is provided on a side surface of the optical connection unit and performs optical connection with a lens provided on an optical connection unit of a receptacle in a direction orthogonal to an inserting/removing direction of the plug, and a locating surface that is provided on the side surface of the optical connection unit and abuts on a locating surface of the receptacle to determine a position of the optical connection unit in a mating condition of the plug into the receptacle.Type: ApplicationFiled: October 2, 2015Publication date: January 11, 2018Inventors: Akihiro YODOGAWA, Hideki KAMITSUNA, Ryo NAGASE
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Patent number: 9568687Abstract: The present invention is directed to an optical connector that is provided with a plug and a jack for the optical connector. A lens (plug-side optical coupling part) that optically couples light transmitted inside an optical fiber held by the plug, to a jack, is disposed on a side surface of the plug. A lens (jack-side optical coupling part) that optically couples light transmitted inside an optical fiber held by the jack, to the plug, is disposed on an inner side surface of the jack.Type: GrantFiled: August 28, 2013Date of Patent: February 14, 2017Assignee: Yokowo Co., Ltd.Inventors: Kenichi Sato, Hideki Kamitsuna, Satomi Tanaka, Ryo Nagase
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Publication number: 20150241640Abstract: The present invention is directed to an optical connector that is provided with a plug and a jack for the optical connector. A lens (plug-side optical coupling part) that optically couples light transmitted inside an optical fiber held by the plug, to a jack, is disposed on a side surface of the plug. A lens (jack-side optical coupling part) that optically couples light transmitted inside an optical fiber held by the jack, to the plug, is disposed on an inner side surface of the jack.Type: ApplicationFiled: August 28, 2013Publication date: August 27, 2015Inventors: Kenichi Sato, Hideki Kamitsuna, Satomi Tanaka, Ryo Nagase
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Patent number: 9083476Abstract: A signal multiplexing device includes a selector (1) that selects one of input data (4) and a complementary signal (16), a clock recovery circuit (30a) that adjusts the phase of a recovered clock (7) to the timing of the output signal of the selector (1), and a flip-flop circuit (3) that performs identification/recovery of the output signal of the selector (1) based on the recovered clock (7). The frequency of the complementary signal (16) is an integral submultiple of the frequency of the recovered clock (7). The selector (1) selects the complementary signal (16) during part of the no-signal period of the input data (4).Type: GrantFiled: January 20, 2012Date of Patent: July 14, 2015Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Hiroaki Katsurai, Hideki Kamitsuna, Yusuke Ohtomo
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Publication number: 20130294464Abstract: A signal multiplexing device includes a selector (1) that selects one of input data (4) and a complementary signal (16), a clock recovery circuit (30a) that adjusts the phase of a recovered clock (7) to the timing of the output signal of the selector (1), and a flip-flop circuit (3) that performs identification/recovery of the output signal of the selector (1) based on the recovered clock (7). The frequency of the complementary signal (16) is an integral submultiple of the frequency of the recovered clock (7). The selector (1) selects the complementary signal (16) during part of the no-signal period of the input data (4).Type: ApplicationFiled: January 20, 2012Publication date: November 7, 2013Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Hiroaki Katsurai, Hideki Kamitsuna, Yusuke Ohtomo
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Patent number: 7557674Abstract: Four SP4T switches (31-34) are grouped in twos to form two switch pairs. First conductive lines (411-414, 421-424) are arranged in fours between the SP4T switches (31, 34; 32, 33) constituting the switch pairs. Each of four second conductive lines (51-54) connects to a corresponding one of different conductive lines of the first conductive lines which connect to the respective switch pairs. The first and second conductive lines are arranged on a dielectric layer having a lower surface on which a ground conductor (6) is formed. The dielectric, layer has a two-layer structure. The first conductive lines are arranged on the first dielectric layer as a lower layer. The second conductive lines are arranged on the second dielectric layer as an upper layer. This arrangement makes it possible to attain a reduction in the size of a matrix switch and a reduction in loss and allow broadband operation.Type: GrantFiled: March 7, 2006Date of Patent: July 7, 2009Assignee: Nippon Telephone and Telegraph CorporationInventor: Hideki Kamitsuna
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Publication number: 20070241837Abstract: Four SP4T switches (31-34) are grouped in twos to form two switch pairs. First conductive lines (411-414, 421-424) are arranged in fours between the SP4T switches (31, 34; 32, 33) constituting the switch pairs. Each of four second conductive lines (51-54) connects to a corresponding one of different conductive lines of the first conductive lines which connect to the respective switch pairs. The first and second conductive lines are arranged on a dielectric layer having a lower surface on which a ground conductor (6) is formed. The dielectric, layer has a two-layer structure. The first conductive lines are arranged on the first dielectric layer as a lower layer. The second conductive lines are arranged on the second dielectric layer as an upper layer. This arrangement makes it possible to attain a reduction in the size of a matrix switch and a reduction in loss and allow broadband operation.Type: ApplicationFiled: March 7, 2006Publication date: October 18, 2007Inventor: Hideki Kamitsuna
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Patent number: 7054403Abstract: A phase lock circuit has a signal path to which a phase comparator, a loop filter and a voltage control oscillator are connected in series, the phase comparator being adapted to compare the phase of an input signal VIN with the phase in the output signal of the voltage control oscillator and to output its result of comparison, the loop filter being adapted to receive the output signal of the phase comparator and to output a DC voltage; the voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of the loop filter, the phase lock circuit further comprising voltage tracking means for adding, to the voltage of the signal path, a signal causing the average voltage in the output voltage of the phase comparator to coincide with a predetermined reference voltage, whereby the voltage tracking means can enlarge the lock range in the phase lock circuit.Type: GrantFiled: March 21, 2001Date of Patent: May 30, 2006Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Hideyuki Nosaka, Hiroyuki Fukuyama, Hideki Kamitsuna
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Publication number: 20020159554Abstract: A phase lock circuit has a signal path to which a phase comparator, a loop filter and a voltage control oscillator are connected in series, the phase comparator being adapted to compare the phase of an input signal VIN with the phase in the output signal of the voltage control oscillator and to output its result of comparison, the loop filter being adapted to receive the output signal of the phase comparator and to output a DC voltage; the voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of the loop filter, the phase lock circuit further comprising voltage tracking means for adding, to the voltage of the signal path, a signal causing the average voltage in the output voltage of the phase comparator to coincide with a predetermined reference voltage, whereby the voltage tracking means can enlarge the lock range in the phase lock circuit.Type: ApplicationFiled: November 20, 2001Publication date: October 31, 2002Inventors: Hideyuki Nosaka, Hiroyuki Fukuyama, Hideki Kamitsuna