Patents by Inventor Hideki Kawada
Hideki Kawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240257783Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.Type: ApplicationFiled: April 11, 2024Publication date: August 1, 2024Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 11961491Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.Type: GrantFiled: June 1, 2023Date of Patent: April 16, 2024Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Publication number: 20230306925Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.Type: ApplicationFiled: June 1, 2023Publication date: September 28, 2023Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 11699411Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.Type: GrantFiled: July 29, 2022Date of Patent: July 11, 2023Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Publication number: 20220366867Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.Type: ApplicationFiled: July 29, 2022Publication date: November 17, 2022Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 11404017Abstract: An electro-optical device is provided and includes first signal lines extending in first direction on substrate; second signal lines extending in second direction on substrate, second direction intersecting first direction; pixel area in which pixel electrodes are disposed; outer peripheral edge of pixel area having curved or bent portions; first and second circuit blocks arranged along curved or bent portions, each of first and second circuit blocks including at least two unit circuits, wherein second circuit block is arranged adjacent to first circuit block with gap therebetween in first direction, first circuit block has first upper part and first lower part that define width of first circuit block in second direction, second circuit block has second upper part and second lower part that define width of second circuit block in second direction, and first upper part is arranged between second upper part and second lower part in second direction.Type: GrantFiled: July 9, 2021Date of Patent: August 2, 2022Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Publication number: 20210335313Abstract: An electro-optical device is provided and includes first signal lines extending in first direction on substrate; second signal lines extending in second direction on substrate, second direction intersecting first direction; pixel area in which pixel electrodes are disposed; outer peripheral edge of pixel area having curved or bent portions; first and second circuit blocks arranged along curved or bent portions, each of first and second circuit blocks including at least two unit circuits, wherein second circuit block is arranged adjacent to first circuit block with gap therebetween in first direction, first circuit block has first upper part and first lower part that define width of first circuit block in second direction, second circuit block has second upper part and second lower part that define width of second circuit block in second direction, and first upper part is arranged between second upper part and second lower part in second direction.Type: ApplicationFiled: July 9, 2021Publication date: October 28, 2021Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 11062668Abstract: An electro-optical device includes first and second signal lines extending in first and second directions respectively on a component substrate; a pixel area disposed at a portion corresponding to an intersection of the first and second signal lines; a signal output circuit disposed outside the pixel area and outputs a driving signal to the first signal line and including circuit blocks arranged next to one another, wherein an outer peripheral edge of the pixel area has a curved or bent portion facing the signal output circuit, a first circuit block included in the circuit blocks is arranged along the curved or bent portion, and a second circuit block included in the circuit blocks and adjacent to the first circuit block is arranged so as to be displaced in the first direction from the first circuit block, and a lead-out area where the first and second circuit blocks are connected.Type: GrantFiled: June 19, 2020Date of Patent: July 13, 2021Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Publication number: 20200320950Abstract: An electro-optical device includes first and second signal lines extending in first and second directions respectively on a component substrate; a pixel area disposed at a portion corresponding to an intersection of the first and second signal lines; a signal output circuit disposed outside the pixel area and outputs a driving signal to the first signal line and including circuit blocks arranged next to one another, wherein an outer peripheral edge of the pixel area has a curved or bent portion facing the signal output circuit, a first circuit block included in the circuit blocks is arranged along the curved or bent portion, and a second circuit block included in the circuit blocks and adjacent to the first circuit block is arranged so as to be displaced in the first direction from the first circuit block, and a lead-out area where the first and second circuit blocks are connected.Type: ApplicationFiled: June 19, 2020Publication date: October 8, 2020Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 10692453Abstract: An electro-optical device includes first and second signal lines extending in directions intersecting each other on a component substrate, a pixel area including a pixel electrode disposed in correspondence with an intersection of the first and second signal lines, a signal output circuit disposed outside the pixel area and outputs a driving signal to the first signal line, and a connection wiring connecting the signal output circuit and the first signal line. An outer peripheral edge of the pixel area has a curved portion or a bent portion in a portion facing the signal output circuit, and the signal output circuit includes a plurality of circuit blocks arranged along the curved portion or the bent portion of the portion facing the signal output circuit with deviated between adjacent circuit blocks in the direction of extension of the first signal line and/or the direction of extension of the second signal line.Type: GrantFiled: March 8, 2017Date of Patent: June 23, 2020Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Publication number: 20170178563Abstract: An electro-optical device includes first and second signal lines extending in directions intersecting each other on a component substrate, a pixel area including a pixel electrode disposed in correspondence with an intersection of the first and second signal lines, a signal output circuit disposed outside the pixel area and outputs a driving signal to the first signal line, and a connection wiring connecting the signal output circuit and the first signal line. An outer peripheral edge of the pixel area has a curved portion or a bent portion in a portion facing the signal output circuit, and the signal output circuit includes a plurality of circuit blocks arranged along the curved portion or the bent portion of the portion facing the signal output circuit with deviated between adjacent circuit blocks in the direction of extension of the first signal line and/or the direction of extension of the second signal line.Type: ApplicationFiled: March 8, 2017Publication date: June 22, 2017Inventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Patent number: 9626900Abstract: An electro-optical device includes first and second signal lines that extend in directions for intersecting each other on a component substrate, a pixel area in which a pixel electrode is disposed in correspondence with an intersection of the first and second signal lines, a signal output circuit that is disposed outside the pixel area and outputs a driving signal to the first signal line, and a connection wiring that connects the signal output circuit and the first signal line together. An outer peripheral edge of the pixel area has a curved portion or a bent portion in a portion facing the signal output circuit, and the signal output circuit includes a plurality of circuit blocks, and the circuit blocks are arranged along the curved portion or the bent portion of the portion facing the signal output circuit with deviated between adjacent circuit blocks in the direction of extension of the first signal line and/or the direction of extension of the second signal line.Type: GrantFiled: September 16, 2008Date of Patent: April 18, 2017Assignee: Japan Display Inc.Inventors: Katsuya Anzai, Hideki Kawada, Hiroshi Matsuda, Yukitada Iwasaki
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Patent number: 8363197Abstract: The occurrence of the poor electric connection between the outer circuit and the liquid crystal display device can be reduced in the manufacturing method of the outer circuit and liquid display device of this invention. The liquid crystal display device has the pixel region 100P and the outer connection region 107. There are the gate metal layer 15 disposed on the gate insulating film 12, the interlayer insulating film 16 covering the gate metal layer 15, the first conductive layer 19 covering the gate metal layer 15 located on the interlayer insulating film 16, the passivation film 20 with the second opening 22 exposing the part of the first conductive layer 19 that covers the gate metal layer 15, and the second conductive layer 26 covering the first conductive layer 19 exposed from the second opening 22 in the outer connection region. The metal bump 50 of the outer circuit is connected on the second conductive layer 26 through thermal pressure treatment.Type: GrantFiled: September 25, 2008Date of Patent: January 29, 2013Assignee: Sony CorporationInventors: Hiroshi Matsuda, Hideki Kawada
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Patent number: 8159431Abstract: An electrooptic device including a plurality of scanning lines; a plurality of m image signal lines; m connecting signal lines provided in a one-to-one correspondence with the m image signal lines; a plurality of data lines blocked by m lines, m data lines in one block being provided in a one-to-one correspondence with the m image signal lines; a scanning-line driving circuit; a block selecting circuit; a sampling switch provided for each of the plurality of data lines; and pixels provided at the intersections of the plurality of scanning lines and the plurality of data lines. Each pixel becomes a gray level corresponding to the data signal sampled to the data line when the scanning line is selected.Type: GrantFiled: July 31, 2008Date of Patent: April 17, 2012Assignee: Sony CorporationInventors: Shin Fujita, Makoto Hayashi, Hideki Kawada
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Publication number: 20090102758Abstract: An electro-optical device includes first and second signal lines that extend in directions for intersecting each other on a component substrate, a pixel area in which a pixel electrode is disposed in correspondence with an intersection of the first and second signal lines, a signal output circuit that is disposed outside the pixel area and outputs a driving signal to the first signal line, and a connection wiring that connects the signal output circuit and the first signal line together. An outer peripheral edge of the pixel area has a curved portion or a bent portion in a portion facing the signal output circuit, and the signal output circuit includes a plurality of circuit blocks, and the circuit blocks are arranged along the curved portion or the bent portion of the portion facing the signal output circuit with deviated between adjacent circuit blocks in the direction of extension of the first signal line and/or the direction of extension of the second signal line.Type: ApplicationFiled: September 16, 2008Publication date: April 23, 2009Applicant: EPSON IMAGING DEVICES CORPORATIONInventors: Katsuya ANZAI, Hideki KAWADA, Hiroshi MATSUDA, Yukitada IWASAKI
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Publication number: 20090091523Abstract: An electrooptic device includes: a plurality of scanning lines; a plurality of m image signal lines; m connecting signal lines provided in a one-to-one correspondence with the m image signal lines, each connecting signal line being connected to the corresponding image signal line to feed a data signal; a plurality of data lines blocked by m lines, m data lines in one block being provided in a one-to-one correspondence with the m image signal lines; a scanning-line driving circuit that selects the plurality of scanning lines in a predetermined order; a block selecting circuit that outputs sampling signals indicative of the selection of the blocks in a predetermined order during a period selected for one scanning line; a sampling switch provided for each of the plurality of data lines, each sampling switch being turned on between the corresponding image signal line and data line when the sampling signal selects a block; and pixels provided at the intersections of the plurality of scanning lines and the pluralitType: ApplicationFiled: July 31, 2008Publication date: April 9, 2009Applicant: EPSON IMAGING DEVICES CORPORATIONInventors: Shin FUJITA, Makoto HAYASHI, Hideki KAWADA
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Publication number: 20090026455Abstract: The occurrence of the poor electric connection between the outer circuit and the liquid crystal display device can be reduced in the manufacturing method of the outer circuit and liquid display device of this invention. The liquid crystal display device has the pixel region 100P and the outer connection region 107. There are the gate metal layer 15 disposed on the gate insulating film 12, the interlayer insulating film 16 covering the gate metal layer 15, the first conductive layer 19 covering the gate metal layer 15 located on the interlayer insulating film 16, the passivation film 20 with the second opening 22 exposing the part of the first conductive layer 19 that covers the gate metal layer 15, and the second conductive layer 26 covering the first conductive layer 19 exposed from the second opening 22 in the outer connection region. The metal bump 50 of the outer circuit is connected on the second conductive layer 26 through thermal pressure treatment.Type: ApplicationFiled: September 25, 2008Publication date: January 29, 2009Applicant: Epson Imaging Devices CorporationInventors: Hiroshi MATSUDA, Hideki Kawada
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Patent number: 7446845Abstract: The occurrence of the poor electric connection between the outer circuit and the liquid crystal display device can be reduced in the manufacturing method of the outer circuit and liquid display device of this invention. The liquid crystal display device has the pixel region 100P and the outer connection region 107. There are the gate metal layer 15 disposed on the gate insulating film 12, the interlayer insulating film 16 covering the gate metal layer 15, the first conductive layer 19 covering the gate metal layer 15 located on the interlayer insulating film 16, the passivation film 20 with the second opening 22 exposing the part of the first conductive layer 19 that covers the gate metal layer 15, and the second conductive layer 26 covering the first conductive layer 19 exposed from the second opening 22 in the outer connection region. The metal bump 50 of the outer circuit is connected on the second conductive layer 26 through thermal pressure treatment.Type: GrantFiled: July 18, 2006Date of Patent: November 4, 2008Assignee: Epson Imaging Devices CorporationInventors: Hiroshi Matsuda, Hideki Kawada
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Publication number: 20080091841Abstract: A communication method is provided in which irrespective of whether the communication apparatus is in a condition of being able to cache the received data or not, it is made possible to receive segment data having a sequence number assigned thereto continuously with the reception of the resent lost data, whereby the reduction in communication throughput can be reduced and the time can be reduced that is required for the reception of all the segment data to be completed. In a first communication apparatus and a second communication apparatus that perform data communication based on the TCP, the first communication apparatus receives information corresponding to a scheduled sequence number equal to the previously received scheduled sequence number (S205: YES), and when the number of times of continuous reception reaches a predetermined number of times (S208: YES), returns the sequence number to the received scheduled sequence number (S209).Type: ApplicationFiled: September 26, 2007Publication date: April 17, 2008Applicant: FUJITSU LIMITEDInventors: Satoshi Namura, Hideki Kawada
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Publication number: 20070019121Abstract: The occurrence of the poor electric connection between the outer circuit and the liquid crystal display device can be reduced in the manufacturing method of the outer circuit and liquid display device of this invention. The liquid crystal display device has the pixel region 100P and the outer connection region 107. There are the gate metal layer 15 disposed on the gate insulating film 12, the interlayer insulating film 16 covering the gate metal layer 15, the first conductive layer 19 covering the gate metal layer 15 located on the interlayer insulating film 16, the passivation film 20 with the second opening 22 exposing the part of the first conductive layer 19 that covers the gate metal layer 15, and the second conductive layer 26 covering the first conductive layer 19 exposed from the second opening 22 in the outer connection region. The metal bump 50 of the outer circuit is connected on the second conductive layer 26 through thermal pressure treatment.Type: ApplicationFiled: July 18, 2006Publication date: January 25, 2007Applicant: Sanyo Epson Imaging Devices Corp.Inventors: Hiroshi Matsuda, Hideki Kawada