Patents by Inventor Hideki Kawahara
Hideki Kawahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230261417Abstract: An object of the present disclosure is to relieve tension applied to a cable. A cable connection device (2) includes a first holder (3), a second holder (4) and a support (5). The first holder (3) is configured to hold a tip part (111) of an end (110) of a first cable (11). The second holder (4) is configured to hold an intermediate part (112) of the end (110). The support (5) is configured to support the first holder (3). The second holder (4) is fixed with respect to a power feed control device body (10). The first holder (3) is supported by the second holder (4) through the support (5) to restrict at least movement of the first cable (11) in a pulling direction of the first cable (11).Type: ApplicationFiled: May 17, 2021Publication date: August 17, 2023Inventors: Ryota TOMIYAMA, Hideki KAWAHARA, Hideki OKA, Kouji KAKIUCHI, Mizuki YAGURA, Shinichi NAKAMURA
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Publication number: 20220415843Abstract: A semiconductor device includes a semiconductor element, a conductive member, and solder portions. The semiconductor element includes first main electrodes and a protective film on a first main surface, and a second main electrode on a second main surface. The protective film has an interposed film portion between the first main electrodes. The conductive member has facing portions each facing a corresponding one of the first main electrodes and an interposed conductive portion disposed between the facing portions. The solder portions are disposed between the first main electrodes and the facing portions and separated away from each other by the interposed film portion and the interposed conductive portion to define a space between the solder portions. The interposed film portion and the interposed conductive portion are less likely wetted to the solder portions to avoid the solder portions in liquid phase entering into the space during soldering.Type: ApplicationFiled: June 16, 2022Publication date: December 29, 2022Inventor: Hideki KAWAHARA
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Patent number: 10535577Abstract: In a semiconductor device, a plurality of semiconductor chips included in an upper-arm circuit are connected in parallel between a pair of upper-arm plates, while a plurality of semiconductor chips included in a lower-arm circuit are connected in parallel between a pair of lower-arm plates. In each of the arm circuits, the plurality of semiconductor chips are arranged in a direction perpendicular to a direction in which emitter electrodes and pads are arranged, the pads are disposed on the same side of the emitter electrodes, and signal terminals extend in the same direction. A series-connecting part between the upper- and lower-arm circuits includes a joint part 20 continued to respective side surfaces of the corresponding upper- and lower-arm plates. Each of inductances of respective parallel-connecting parts of the upper- and lower-arm plates which connect the semiconductor chips in parallel is smaller than an inductance of the series-connecting part.Type: GrantFiled: April 27, 2017Date of Patent: January 14, 2020Assignee: DENSO CORPORATIONInventors: Hiroshi Ishino, Hideki Kawahara, Shinji Hiramitsu, Shunsuke Arai
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Patent number: 10367346Abstract: The electric leakage protection device (feed control device includes an electric leakage detector, an electric leakage protector, and a self leakage generator. The electric leakage detector outputs an electric leakage detection signal when a current leaked from a main circuit exceeds a threshold value. The electric leakage protector opens a contact device interposed in the main circuit when receiving the electric leakage detection signal. The self leakage generator includes; a first short circuit having a first electric resistance component and a first switch component electrically connected in series with each other, and a second short circuit having a second electric resistance component and a second switch component electrically connected in series with each other. The first short circuit and the second short circuit are electrically connected in parallel with each other with regard to a pair of power supply paths constituting the main circuit.Type: GrantFiled: February 26, 2015Date of Patent: July 30, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Naoki Fukuo, Koji Yamato, Hideki Kawahara
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Publication number: 20190088568Abstract: In a semiconductor device, a plurality of semiconductor chips included in an upper-arm circuit are connected in parallel between a pair of upper-arm plates, while a plurality of semiconductor chips included in a lower-arm circuit are connected in parallel between a pair of lower-arm plates. In each of the arm circuits, the plurality of semiconductor chips are arranged in a direction perpendicular to a direction in which emitter electrodes and pads are arranged, the pads are disposed on the same side of the emitter electrodes, and signal terminals extend in the same direction. A series-connecting part between the upper- and lower-arm circuits includes a joint part 20 continued to respective side surfaces of the corresponding upper- and lower-arm plates. Each of inductances of respective parallel-connecting parts of the upper- and lower-arm plates which connect the semiconductor chips in parallel is smaller than an inductance of the series-connecting part.Type: ApplicationFiled: April 27, 2017Publication date: March 21, 2019Inventors: Hiroshi ISHINO, Hideki KAWAHARA, Shinji HIRAMITSU, Shunsuke ARAI
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Publication number: 20170222424Abstract: The electric leakage protection device (feed control device includes an electric leakage detector, an electric leakage protector, and a self leakage generator. The electric leakage detector outputs an electric leakage detection signal when a current leaked from a main circuit exceeds a threshold value. The electric leakage protector opens a contact device interposed in the main circuit when receiving the electric leakage detection signal. The self leakage generator includes; a first short circuit having a first electric resistance component and a first switch component electrically connected in series with each other, and a second short circuit having a second electric resistance component and a second switch component electrically connected in series with each other. The first short circuit and the second short circuit are electrically connected in parallel with each other with regard to a pair of power supply paths constituting the main circuit.Type: ApplicationFiled: February 26, 2015Publication date: August 3, 2017Inventors: Naoki FUKUO, Koji YAMATO, Hideki KAWAHARA
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Patent number: 9373570Abstract: A semiconductor module includes: a semiconductor element; first and second main current passages for energizing the semiconductor element, the first and second main current passages being opposed to each other in such a manner that a first energization direction of the first main current passage is opposite to a second energization direction of the second main current passage, or an angle between the first energization direction and the second energization direction is an obtuse angle; and a coil unit sandwiched between the first and second main current passages. The coil unit includes a coil, which generates an induced electromotive force when a magnetic flux interlinks with the coil, the magnetic flux being generated when current flows through the first and second main current passages.Type: GrantFiled: May 1, 2014Date of Patent: June 21, 2016Assignee: DENSO CORPORATIONInventors: Hideki Kawahara, Takanori Imazawa
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Patent number: 9213217Abstract: Disclosed is an imaging apparatus provided with: a light irradiation unit which irradiates a target area with light; a differential image generation unit which generates a differential image between a first image which was taken in synchronization with the irradiation period during which the light irradiation unit irradiates the light and a second image which was taken outside the irradiation period; a transmittance estimation unit which estimates the light transmittance of an object in the target area; and a light exposure adjustment unit which adjusts the exposure based on the estimation result from the transmittance estimation unit. The transmittance estimation unit estimates the transmittance of the object from at least one of the first image, the second image, and the differential image.Type: GrantFiled: February 23, 2011Date of Patent: December 15, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yasuhiro Mori, Hideki Kawahara, Mutsuhiro Yamanaka, Toshiharu Takenouchi, Eiji Nakamoto, Osamu Uesugi
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Publication number: 20140346635Abstract: A semiconductor module includes: a semiconductor element; first and second main current passages for energizing the semiconductor element, the first and second main current passages being opposed to each other in such a manner that a first energization direction of the first main current passage is opposite to a second energization direction of the second main current passage, or an angle between the first energization direction and the second energization direction is an obtuse angle; and a coil unit sandwiched between the first and second main current passages. The coil unit includes a coil, which generates an induced electromotive force when a magnetic flux interlinks with the coil, the magnetic flux being generated when current flows through the first and second main current passages.Type: ApplicationFiled: May 1, 2014Publication date: November 27, 2014Applicant: DENSO CORPORATIONInventors: Hideki KAWAHARA, Takanori IMAZAWA
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Patent number: 8781819Abstract: The invention relates to a periodic signal processing method, a periodic signal conversion method, and a periodic signal processing device capable of reducing the influence of periodicity without using a spectral model. Time windows are arranged such that a center of each of the time windows is at a division position which divides a fundamental frequency in a temporal direction into fractions 1/n (where n is an integer equal to or larger than 2) so as to extract a plurality of portions of different ranges from a signal having periodicity. A power spectrum for the plurality of portions extracted by the respective time windows is calculated, and the calculated power spectrum is added with a same ratio.Type: GrantFiled: July 18, 2008Date of Patent: July 15, 2014Assignee: Wakayama UniversityInventors: Hideki Kawahara, Masanori Morise, Toru Takahashi, Toshio Irino
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Publication number: 20120320218Abstract: Disclosed is an imaging apparatus provided with: a light irradiation unit which irradiates a target area with light; a differential image generation unit which generates a differential image between a first image which was taken in synchronization with the irradiation period during which the light irradiation unit irradiates the light and a second image which was taken outside the irradiation period; a transmittance estimation unit which estimates the light transmittance of an object in the target area; and a light exposure adjustment unit which adjusts the exposure based on the estimation result from the transmittance estimation unit. The transmittance estimation unit estimates the transmittance of the object from at least one of the first image, the second image, and the differential image.Type: ApplicationFiled: February 23, 2011Publication date: December 20, 2012Inventors: Yasuhiro Mori, Hideki Kawahara, Mutsuhiro Yamanaka, Toshiharu Takenouchi, Eiji Nakamoto, Osamu Uesugi
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Patent number: 8212261Abstract: A SiC device includes: a substrate; a drift layer; a base region; a source region; a channel layer connecting the drift layer and the source region; a gate oxide film on the channel layer and the source region; a gate electrode on the gate oxide film; an interlayer insulation film with a contact hole having a barrier layer and a BPSG insulation film on the gate electrode; a source electrode having upper and lower wiring electrodes on the interlayer insulation film and in the contact hole for connecting the base region and the source region; and a drain electrode on the substrate. The barrier layer prevents a Ni component in the lower wiring electrode from being diffused into the BPSG insulation film.Type: GrantFiled: May 13, 2008Date of Patent: July 3, 2012Assignee: DENSO CORPORATIONInventors: Hiroyuki Ichikawa, Hideki Kawahara, Hiroki Nakamura
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Publication number: 20110015931Abstract: The invention relates to a periodic signal processing method, a periodic signal conversion method, and a periodic signal processing device capable of reducing the influence of periodicity without using a spectral model. Time windows are arranged such that a center of each of the time windows is at a division position which divides a fundamental frequency in a temporal direction into fractions 1/n (where n is an integer equal to or larger than 2) so as to extract a plurality of portions of different ranges from a signal having periodicity. A power spectrum for the plurality of portions extracted by the respective time windows is calculated, and the calculated power spectrum is added with a same ratio.Type: ApplicationFiled: July 18, 2008Publication date: January 20, 2011Inventors: Hideki Kawahara, Masanori Morise, Toru Takahashi, Toshio Irino
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Patent number: 7851382Abstract: A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process.Type: GrantFiled: May 29, 2008Date of Patent: December 14, 2010Assignee: DENSO CORPORATIONInventors: Hiroki Nakamura, Hideki Kawahara
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Patent number: 7645975Abstract: A spatial information detecting device for accurately detecting information of a target space is provided. This device has photoelectric converters for receiving a reflection light from the space, in which a flashing light is being irradiated, a charge storage portion formed in each of the photoelectric converters by applying a control voltage to electrodes on each of the photoelectric converters, a controller for controlling the number of electrodes, to which the control voltage is applied, such that an area of the charge storage portion changes based on a flash cycle of the flashing light, and an amplitude-image generator for generating an amplitude image having pixel values, each of which is provided by a difference between electric charges collected in a lighting period of the flashing light by a charge storage portion and the electric charges collected in a non-lighting period of the flashing light by another charge storage portion.Type: GrantFiled: October 24, 2005Date of Patent: January 12, 2010Assignee: Panasonic Electric Works Co., Ltd.Inventors: Hideki Kawahara, Motoo Ikari, Kenichi Hagio, Eiji Nakamoto
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Publication number: 20080315211Abstract: A SiC device includes: a substrate; a drift layer; a base region; a source region; a channel layer connecting the drift layer and the source region; a gate oxide film on the channel layer and the source region; a gate electrode on the gate oxide film; an interlayer insulation film with a contact hole having a barrier layer and a BPSG insulation film on the gate electrode; a source electrode having upper and lower wiring electrodes on the interlayer insulation film and in the contact hole for connecting the base region and the source region; and a drain electrode on the substrate. The barrier layer prevents a Ni component in the lower wiring electrode from being diffused into the BPSG insulation film.Type: ApplicationFiled: May 13, 2008Publication date: December 25, 2008Applicant: DENSO CORPORATIONInventors: Hiroyuki Ichikawa, Hideki Kawahara, Hiroki Nakamura
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Publication number: 20080318438Abstract: A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process.Type: ApplicationFiled: May 29, 2008Publication date: December 25, 2008Applicant: DENSO CORPORATIONInventors: Hiroki Nakamura, Hideki Kawahara
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Patent number: D795802Type: GrantFiled: May 27, 2016Date of Patent: August 29, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Noboru Inagaki, Hideki Kawahara, Shinichi Nakamura, Masahiko Kimura
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Patent number: D1019768Type: GrantFiled: December 24, 2021Date of Patent: March 26, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Shigeaki Isobe, Manabu Kawahara, Hideki Kato
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Patent number: D1025204Type: GrantFiled: December 23, 2021Date of Patent: April 30, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Satoshi Kaminaga, Hideki Kato, Manabu Kawahara