Patents by Inventor Hideki Kiritani

Hideki Kiritani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10400151
    Abstract: To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 ?m and at most 1 ?m, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa·s.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: September 3, 2019
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masanori Yamazaki, Mari Abe, Tomohide Murase, Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani, Yasunori Matsushita
  • Patent number: 10125289
    Abstract: To provide a composition which satisfies a high K1c value, a high glass transition temperature and a low viscosity simultaneously, and which is capable of forming an interlayer filler layer for a layered semiconductor device of which stable bonding is maintained even regardless of changes of environment. A composition comprising an epoxy compound (A) having a viscosity at 25° C. of at most 50 Pa·s, an amine compound (B) having a melting point or softening point of at least 80° C., and an amine compound (C) having a melting point or softening point of less than 80° C., wherein the proportion of the amine compound (C) is at least 1 part by weight and less than 40 parts by weight per 100 parts by weight of the total amount of the amine compound (B) and the amine compound (C).
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: November 13, 2018
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masaya Sugiyama, Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani, Masanori Yamazaki
  • Patent number: 9847298
    Abstract: To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property. A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m·K) between the semiconductor substrate.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: December 19, 2017
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani
  • Publication number: 20170335160
    Abstract: To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 ?m and at most 1 ?m, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa·s.
    Type: Application
    Filed: August 2, 2017
    Publication date: November 23, 2017
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Masanori YAMAZAKI, Mari ABE, Tomohide MURASE, Yasuhiro KAWASE, Makoto IKEMOTO, Hideki KIRITANI, Yasunori MATSUSHITA
  • Patent number: 9822294
    Abstract: To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 ?m and at most 1 ?m, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa·s.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: November 21, 2017
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masanori Yamazaki, Mari Abe, Tomohide Murase, Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani, Yasunori Matsushita
  • Patent number: 9783722
    Abstract: To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 ?m and at most 1 ?m, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa·s.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: October 10, 2017
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masanori Yamazaki, Mari Abe, Tomohide Murase, Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani, Yasunori Matsushita
  • Publication number: 20170033050
    Abstract: To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property. A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m·K) between the semiconductor substrate.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yasuhiro KAWASE, Makoto IKEMOTO, Hideki KIRITANI
  • Patent number: 9508648
    Abstract: To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property, a three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(rrrK) between the semiconductor substrate.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani
  • Publication number: 20160009947
    Abstract: To provide a composition which satisfies a high K1c value, a high glass transition temperature and a low viscosity simultaneously, and which is capable of forming an interlayer filler layer for a layered semiconductor device of which stable bonding is maintained even regardless of changes of environment. A composition comprising an epoxy compound (A) having a viscosity at 25° C. of at most 50 Pa·s, an amine compound (B) having a melting point or softening point of at least 80° C., and an amine compound (C) having a melting point or softening point of less than 80° C., wherein the proportion of the amine compound (C) is at least 1 part by weight and less than 40 parts by weight per 100 parts by weight of the total amount of the amine compound (B) and the amine compound (C).
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Masaya SUGIYAMA, Yasuhiro Kawase, Makoto Ikemoto, Hideki Kiritani, Masanori Yamazaki
  • Publication number: 20140349105
    Abstract: To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 ?m and at most 1 ?m, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa·s.
    Type: Application
    Filed: May 29, 2014
    Publication date: November 27, 2014
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Masanori YAMAZAKI, Mari ABE, Tomohide MURASE, Yasuhiro Kawase, Makoto IKEMOTO, Hideki KIRITANI, Yasunori MATSUSHITA
  • Publication number: 20140027885
    Abstract: To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property. A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m·K) between the semiconductor substrate.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Yasuhiro KAWASE, Makoto Ikemoto, Hideki Kiritani