Patents by Inventor Hideki KOBA

Hideki KOBA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9722769
    Abstract: An equalizer includes a data sampler that samples input data and outputs a time-series data string according to the input data, an arithmetic circuit that multiplies a data string output before reference data in the data string output from the data sampler by a tap coefficient and forms the input data by an arithmetic operation of a multiplication result and an input signal, a tap coefficient calculation circuit that updates the tap coefficient based on a data string output before the reference data, and a determination circuit that receives the reference data and data output after the reference data in the data string and controls presence or absence of update of the tap coefficient performed by the tap coefficient calculation circuit.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: August 1, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takemasa Komori, Hideki Koba, Junya Nasu
  • Publication number: 20170180162
    Abstract: An adaptive equalizer includes: a speculative equalization circuit which operates a plurality of first tap coefficients with respect to input data and selects operation data corresponding to the input data from a plurality of operation data obtained by the operation; and an adaptive equalization circuit which generates the plurality of first tap coefficients, on the basis of the input data.
    Type: Application
    Filed: June 20, 2016
    Publication date: June 22, 2017
    Inventors: Hideki KOBA, Keiki WATANABE, Fumio YUKI
  • Patent number: 9667454
    Abstract: An adaptive equalizer includes: a speculative equalization circuit which operates a plurality of first tap coefficients with respect to input data and selects operation data corresponding to the input data from a plurality of operation data obtained by the operation; and an adaptive equalization circuit which generates the plurality of first tap coefficients, on the basis of the input data.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: May 30, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Koba, Keiki Watanabe, Fumio Yuki
  • Publication number: 20170005841
    Abstract: An equalizer includes a data sampler that samples input data and outputs a time-series data string according to the input data, an arithmetic circuit that multiplies a data string output before reference data in the data string output from the data sampler by a tap coefficient and forms the input data by an arithmetic operation of a multiplication result and an input signal, a tap coefficient calculation circuit that updates the tap coefficient based on a data string output before the reference data, and a determination circuit that receives the reference data and data output after the reference data in the data string and controls presence or absence of update of the tap coefficient performed by the tap coefficient calculation circuit.
    Type: Application
    Filed: February 17, 2016
    Publication date: January 5, 2017
    Inventors: Takemasa KOMORI, Hideki KOBA, Junya NASU
  • Patent number: 8963637
    Abstract: A semiconductor device capable of achieving high speed performance in addition to correction of differential offset and a communication device provided with the semiconductor device are provided. For example, there are provided: a variable gain type differential amplifier circuit VGA1 which receives a gain setting signal ASET, which amplifies differential input signals INP and INN by a gain indicated by the gain setting signal, and which outputs differential output signals OUTP? and OTUN?; and an offset correcting circuit unit OFCBK1 which cancels an offset voltage (VOF and VOFO) generated in the VGA1. Here, the OFCBK1 cancels an output offset voltage VOFO (which results in an input offset voltage VOF) by receiving the ASET, generating a correction voltage changed in accordance with the gain, and adding the correction voltage to the OUTP? and OUTN?.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: February 24, 2015
    Assignee: Hitachi, Ltd
    Inventors: Hideki Koba, Keiki Watanabe, Kouji Fukuda
  • Publication number: 20130314158
    Abstract: A semiconductor device capable of achieving high speed performance in addition to correction of differential offset and a communication device provided with the semiconductor device are provided. For example, there are provided: a variable gain type differential amplifier circuit VGA1 which receives a gain setting signal ASET, which amplifies differential input signals INP and INN by a gain indicated by the gain setting signal, and which outputs differential output signals OUTP? and OTUN?; and an offset correcting circuit unit OFCBK1 which cancels an offset voltage (VOF and VOFO) generated in the VGA1. Here, the OFCBK1 cancels an output offset voltage VOFO (which results in an input offset voltage VOF) by receiving the ASET, generating a correction voltage changed in accordance with the gain, and adding the correction voltage to the OUTP? and OUTN?.
    Type: Application
    Filed: May 23, 2013
    Publication date: November 28, 2013
    Inventors: Hideki Koba, Keiki Wantanabe, Kouji Fukuda
  • Patent number: 8441300
    Abstract: Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: May 14, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Keiki Watanabe, Takashi Muto, Hideki Koba
  • Publication number: 20110181335
    Abstract: Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced.
    Type: Application
    Filed: January 26, 2011
    Publication date: July 28, 2011
    Inventors: KEIKI WATANABE, Takashi Muto, Hideki Koba
  • Publication number: 20110038426
    Abstract: In order to optimize with high accuracy parameters that a fast I/F has, optimization by training is required. Regarding these parameters, their optimum values vary to an operating frequency band and a power supply voltage of the I/F. In order to lower the operating frequency band and lower the power supply voltage for reduction of power consumption, re-training that requires a time becomes needed. By obtaining in advance optimum combinations of the operating frequency band, the power supply voltage, and various parameters of the I/F for various parameters of the I/F and then by making a table with them, it is possible to optimize the parameters in a short time by referring to the table in optimizing the power supply voltage. By the optimization of the parameters in a short time being enabled, it is also possible to perform dynamic optimization during an operation of the device.
    Type: Application
    Filed: July 12, 2010
    Publication date: February 17, 2011
    Inventors: Hideki KOBA, Takashi MUTO