Patents by Inventor Hideki Kusamitu

Hideki Kusamitu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6559798
    Abstract: A relatively small phased array antenna is formed at a low cost even if the number of radiating elements increases in order to improve the gain. The phased array antenna has a multilayered structure in which a number of radiating elements (15), a phase shift unit (16) for changing the phase of an RF signal transmitted/received at each radiating element, and a distribution/synthesis unit (14) are formed on different layers. Signal lines (X1-Xm) and scanning lines (Y1-Yn) are wired on a phase control layer (35) to connect phase shift units to each other in a matrix. The signal lines and the scanning lines are matrix-driven by selection units (12X, 12Y) so that desired phase shift amounts are set to phase shift units located at the intersections of the signal and scanning lines. In addition, switches (17S) of a phase shifter (17) are formed at once on the phase control layer.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: May 6, 2003
    Assignee: NEC Corporation
    Inventors: Tsunehisa Marumoto, Ryuichi Iwata, Youichi Ara, Hideki Kusamitu, Kenichiro Suzuki
  • Patent number: 6556168
    Abstract: A relatively small phased array antenna is formed at a low cost even if the number of radiating elements increases in order to improve the gain. The phased array antenna has a multilayered structure in which a number of radiating elements (15), a phase shift unit (16) for changing the phase of an RF signal transmitted/received at each radiating element, and a distribution/synthesis unit (14) are formed on different layers. Signal lines (X1-Xm) and scanning lines (Y1-Yn) are wired on a phase control layer (35) to connect phase shift units to each other in a matrix. The signal lines and the scanning lines are matrix-driven by selection units (12X, 12Y) so that desired phase shift amounts are set to phase shift units located at the intersections of the signal and scanning lines. In addition, circuit portions repeatedly arranged in a single phase shift unit are formed into single chips mounted on another substrate.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: April 29, 2003
    Assignee: NEC Corporation
    Inventors: Tsunehisa Marumoto, Ryuichi Iwata, Youichi Ara, Hideki Kusamitu, Kenichiro Suzuki
  • Patent number: 6535168
    Abstract: A relatively small and inexpensive phased array antenna provided even if the number of radiators is increased to enhance the gain. The phased array antenna has a multilayer structure including layers where a large number of radiators (15), phase-shifting units (17) each for shifting the phase of a high-frequency signal transmitted/received by the corresponding radiator, and a distributing/synthesizing unit (14) are provided respectively. The phase-shifting circuits (17A to 17D) constituting the phase-shifting units (17) are driven by the respective driver units (12). A switch (17S) used for the phase-shifting unit is provided together with the other wiring pattern on the layer where the phase-shifting units (17) are provided.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 18, 2003
    Assignee: NEC Corporation
    Inventors: Tsunehisa Marumoto, Ryuichi Iwata, Youichi Ara, Hideki Kusamitu, Kenichiro Suzuki
  • Patent number: 5973392
    Abstract: A three-dimensional memory module includes a plurality of semiconductor device units, every adjacent two of which are stack-connected via through-holes by a bump connecting method. Each of the plurality of semiconductor device units includes a carrier having a circuit pattern and the through-holes connected to the circuit pattern. The semiconductor device unit also includes at least one semiconductor memory chip mounted on the carrier such that the semiconductor memory chip is connected to the circuit pattern, and at least one chip select semiconductor chip mounted on the carrier to be connected to the circuit pattern such that the chip select semiconductor chip can select the semiconductor memory chip.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: October 26, 1999
    Assignee: NEC Corporation
    Inventors: Naoji Senba, Yuzo Shimada, Ikusi Morizaki, Hideki Kusamitu, Makoto Ohtsuka, Katsumasa Hashimoto