Abstract: A semiconductor device includes a memory cell. The memory cell includes: a magnetic recording layer formed of ferromagnetic material; first and second magnetization fixed layers coupled to the magnetic recording layer; a plurality of reference layers opposed to the magnetic recording layer; and a plurality of tunnel barrier films respectively inserted between the magnetic recording layer and the reference layers. The first magnetization fixed layer has a magnetization fixed in a first direction, and the second magnetization fixed layer has a magnetization fixed in a second direction opposite to first direction. The reference layers each have a magnetization fixed in the first direction or the second direction. The reference layers and the tunnel barrier layers are positioned between the first and second magnetization fixed layers.

Abstract: A semiconductor device includes a memory cell. The memory cell includes: a magnetic recording layer formed of ferromagnetic material; first and second magnetization fixed layers coupled to the magnetic recording layer; a plurality of reference layers opposed to the magnetic recording layer; and a plurality of tunnel barrier films respectively inserted between the magnetic recording layer and the reference layers. The first magnetization fixed layer has a magnetization fixed in a first direction, and the second magnetization fixed layer has a magnetization fixed in a second direction opposite to first direction. The reference layers each have a magnetization fixed in the first direction or the second direction. The reference layers and the tunnel barrier layers are positioned between the first and second magnetization fixed layers.

Abstract: A semiconductor memory device according to the invention comprises a first memory cell region, a second memory cell region, and a sense-amplifier row region disposed between the first and second memory cell regions, wherein the sense-amplifier row region has therein a plurality of transistor rows constituting a plurality of sense-amplifiers, at least one power-supply side sense-amplifier driver transistor disposed on the side f the first memory cell region of the plurality of transistor rows, and at least one ground side sense-amplifier driver transistor disposed on the side of the second memory cell region of the plurality of transistor rows.