Abstract: The present invention correctly identifies the size and shape of a substrate in order to avoid damage to a substrate holder and wasteful disposal of a substrate. Provided is a semiconductor manufacturing device for processing a rectangular substrate.

Abstract: A tire, in which a groove width that opens to a road contact surface of a tread portion is greater than 1.0 mm and 4.0 mm or less, includes: one or more circumferential narrow grooves extending in a tire circumferential direction; and a plurality of sipes communicating with the circumferential narrow groove. The circumferential narrow groove includes: a widened portion provided in a region in which a groove depth from the surface of the tread portion is 30% or more of a maximum groove depth and having a widened groove width; and a plurality of notch portions provided at intervals in the tire circumferential direction to bulge toward one side in a tire width direction to communicate from the surface of the tread portion to the widened portion. The sipes are connected to the notch portions.

Abstract: A tire includes a plurality of main grooves extending in a tire circumferential direction and four or more rows of land portions defined by the main grooves. Moreover, a middle land portion and a center land portion have a plurality of through lug grooves that pass through the land portions in a tire width direction, respectively. Pitch lengths of the through lug grooves are in a range of from 7% or greater to 14% or less of a tire maximum ground contact length. Additionally, maximum groove depths of the through lug grooves are in a range of from 5% or greater to 65% or less of maximum groove depths of the main grooves.

Abstract: A system stores at least one item of connection information for each of a plurality of processing systems. The system receives a request from the requesting apparatus and, in response to receiving the request, sets a status related to one item of the connection information stored in the storage unit for connection to one of the processing systems. The system transmits the received request to the one processing system by using the one item of connection information and receives a response denoting a result of the processing from the one processing system. Responsive to receiving the response, the system releases the status related to the one item of connection information, and transmits the response to the requesting apparatus.

Abstract: A system stores at least one item of connection information for each of a plurality of processing systems. The system receives a request from the requesting apparatus and, in response to receiving the request, sets a status related to one item of the connection information stored in the storage unit for connection to one of the processing systems. The system transmits the received request to the one processing system by using the one item of connection information and receives a response denoting a result of the processing from the one processing system. Responsive to receiving the response, the system releases the status related to the one item of connection information, and transmits the response to the requesting apparatus.

Abstract: An amplifier arrangement is provided which comprises first and second biasing power supply circuits, a push-pull amplifier comprising a pair of transistors, a DC amplifier having a non-inverting input terminal connected to a junction point at which one half of a predetermined potential fed from the first biasing power supply circuit is applied and an inverting input terminal connecting a feedback loop through which the output the amplifier is fedback, a second biasing power supply circuit having a junction point at which the output of the DC amplifier is applied, and means responsive to an output of the DC amplifier for applying either of the first and second predetermined potentials fed from the first and second biasing circuits in accordance with the amount of feedback from the output of the push-pull amplifier to produce an output signal showing a biasing current, whereby the output signal is applied to each base of the push-pull transistors so as to balance the half potential of the first biasing power su