Patents by Inventor Hideki Ohagi

Hideki Ohagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit device
    Patent number: 6031257
    Abstract: In a CMOS gate array, each of bonding pads corresponding to input cells for signals and bonding pads corresponding to input cells for supply voltages is formed of a plurality of conductor layers, whereas each of bonding pads (non-connected pads) corresponding to input/output cells not to be used is formed of, for example, the uppermost conductor layer. Thus, the bonding pad (non-connected pad) corresponding to the input/output cell not to be used becomes greater in the thickness of an underlying insulator film and longer in its spacing from a semiconductor substrate in comparison with each of the bonding pad for the signal and the bonding pad for the supply voltage.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: February 29, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Noto, Eiji Oi, Yahiro Shiotsuki, Kazuo Kato, Hideki Ohagi