Abstract: In a signal transmission system, performing signal transmission via signal interconnections 4-1 to 4-3 between a memory 1 and a memory controller 2 mounted on a printed circuit board 3, noise or jitter may tend to be increased in the memory 1 and in the memory controller 2 at a specified data rate due to interconnection length resonance. Registers 6-1 and 6-2 are provided to hold information on the data rate. These registers 6-1 and 6-2 are provided in the signal transmission system along with a control system that modifies the relationship between clock frequency and interconnection length. The data rate or the propagation delay time is controlled to allow for avoiding the resonance.