Patents by Inventor Hideki Osada

Hideki Osada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150220070
    Abstract: A variable speed device that drives an electric motor includes a first acquiring unit that acquires a first parameter concerning an operation state of the electric motor, a second acquiring unit that acquires a second parameter concerning the operation state of the electric motor, the second parameter being related to the first parameter, a third acquiring unit that acquires a third parameter concerning a setting state of the electric motor, and a display control unit that simultaneously displays, on one display screen, a first display item corresponding to the acquired first parameter, a second display item corresponding to the acquired second parameter, and a third display item corresponding to the acquired third parameter. The display control unit graphically displays the first display item and the second display item in association with each other.
    Type: Application
    Filed: November 14, 2012
    Publication date: August 6, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hideki OSADA
  • Publication number: 20140369920
    Abstract: Group III nitride crystal produced by cutting, from III nitride bulk crystal, a plurality of Group III nitride crystal substrates with major-surface plane orientation misoriented five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates adjacent to each other such that their major surfaces are parallel to each other and such that their [0001] directions coincide with each other, and growing a Group III nitride crystal on the major surfaces. The Group III nitride crystal substrates are further characterized by satisfying at least either an oxygen-atom concentration of 1×1016 cm?3 to 4×1019 cm?3 or a silicon-atom concentration of 6×1014 cm?3 to 5×1018 cm?3, and by having a carrier concentration of 1×1016 cm?3 to 6×1019 cm?3.
    Type: Application
    Filed: August 27, 2014
    Publication date: December 18, 2014
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Patent number: 8847363
    Abstract: A method for producing a Group III nitride crystal includes the steps of cutting a plurality of Group III nitride crystal substrates 10p and 10q having a major surface from a Group III nitride bulk crystal 1, the major surfaces 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20?21}, {20?2?1}, {22?41}, and {22?4?1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the major surfaces 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a Group III nitride crystal 20 on the major surfaces 10pm and 10qm of the substrates 10p and 10q.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: September 30, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Patent number: 8823142
    Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: September 2, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada, Seiji Nakahata
  • Publication number: 20140061668
    Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.
    Type: Application
    Filed: November 8, 2013
    Publication date: March 6, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke FUJIWARA, Koji UEMATSU, Hideki OSADA, Seiji NAKAHATA
  • Publication number: 20130337632
    Abstract: A method for producing a Group III nitride crystal includes the steps of cutting a plurality of Group III nitride crystal substrates 10p and 10q having a major surface from a Group III nitride bulk crystal 1, the major surfaces 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20?21}, {20?2?1}, {22?41}, and {22?4?1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the major surfaces 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a Group III nitride crystal 20 on the major surfaces 10pm and 10qm of the substrates 10p and 10q.
    Type: Application
    Filed: July 29, 2013
    Publication date: December 19, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Patent number: 8598685
    Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: December 3, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada, Seiji Nakahata
  • Patent number: 8524575
    Abstract: A method for producing a group III nitride crystal in the present invention includes the steps of cutting a plurality of group III nitride crystal substrates 10p and 10q having a main plane from a group III nitride bulk crystal 1, the main planes 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the main planes 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a group III nitride crystal 20 on the main planes 10pm and 10qm of the substrates 10p and 10q.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: September 3, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Patent number: 8471366
    Abstract: A nitride semiconductor device includes a main surface and an indicator portion. The main surface is a plane inclined by at least 71° and at most 79° in a [1-100] direction from a (0001) plane or a plane inclined by at least 71° and at most 79° in a [?1100] direction from a (000-1) plane. The indicator portion indicates a (?1017) plane, a (10-1-7) plane, or a plane inclined by at least ?4° and at most 4° in the [1-100] direction from these planes and inclined by at least ?0.5° and at most 0.5° in a direction orthogonal to the [1-100] direction.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hidenori Mikami, Naoki Matsumoto, Hideki Osada, Yusuke Yoshizumi, Sayuri Yamaguchi
  • Publication number: 20130134434
    Abstract: A nitride semiconductor device includes a main surface and an indicator portion. The main surface is a plane inclined by at least 71° and at most 79° in a [1-100] direction from a (0001) plane or a plane inclined by at least 71° and at most 79° in a [?1100] direction from a (000-1) plane. The indicator portion indicates a (?1017) plane, a (10-1-7) plane, or a plane inclined by at least ?4° and at most 4° in the [1-100] direction from these planes and inclined by at least ?0.5° and at most 0.5° in a direction orthogonal to the [1-100] direction.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hidenori Mikami, Naoki Matsumoto, Hideki Osada, Yusuke Yoshizumi, Sayuri Yamaguchi
  • Publication number: 20120329245
    Abstract: A method for producing a group III nitride crystal in the present invention includes the steps of cutting a plurality of group III nitride crystal substrates 10p and 10q having a main plane from a group III nitride bulk crystal 1, the main planes 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the main planes 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a group III nitride crystal 20 on the main planes 10pm and 10qm of the substrates 10p and 10q.
    Type: Application
    Filed: December 28, 2011
    Publication date: December 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Koji Uematsu, Hideki Osada, Seiji Nakahata, Shinsuke Fujiwara
  • Patent number: 8228963
    Abstract: A gallium nitride-based semiconductor optical device is provided that includes an indium-containing gallium nitride-based semiconductor layer that exhibit low piezoelectric effect and high crystal quality. The gallium nitride-based semiconductor optical device 11a includes a GaN support base 13, a GaN-based semiconductor region 15, and well layers 19. A primary surface 13a tilts from a surface orthogonal to a reference axis that extends in a direction from one crystal axis of the m-axis and the a-axis of GaN toward the other crystal axis. The tilt angle AOFF is 0.05 degree or more to less than 15 degrees. The angle AOFF is equal to the angle defined by a vector VM and a vector VN. The inclination of the primary surface is shown by a typical m-plane SM and m-axis vector VM. The GaN-based semiconductor region 15 is provided on the primary surface 13a. In the well layers 19 in an active layer 17, both the m-plane and the a-plane of the well layers 19 tilt from a normal axis AN of the primary surface 13a.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei Enya, Yusuke Yoshizumi, Hideki Osada, Keiji Ishibashi, Katsushi Akita, Masaki Ueno
  • Publication number: 20120074403
    Abstract: The present invention is to provide GaN crystal growing method for growing a GaN crystal with few stacking faults on a GaN seed crystal substrate having a main surface inclined at an angle of 20° to 90° from the (0001) plane, and also to provide a GaN crystal substrate with few stacking faults. A method for growing a GaN crystal includes the steps of preparing a GaN seed crystal substrate 10 having a main surface 10m inclined at an angle of 20° to 90° from a (0001) plane 10c and growing a GaN crystal 20 on the GaN seed crystal substrate 10. The GaN seed crystal substrate 10 and the GaN crystal 20 have a difference in impurity concentration of 3×1018 cm?3 or less.
    Type: Application
    Filed: May 19, 2011
    Publication date: March 29, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada
  • Publication number: 20120034763
    Abstract: The present invention provides a method of manufacturing a nitride semiconductor substrate capable of efficiently manufacturing a nitride semiconductor substrate having a nonpolar plane as a major surface in which polycrystalline growth is minimized. A method of manufacturing a GaN substrate, which is a nitride semiconductor substrate, includes steps (S10 and S20) of preparing a starting substrate composed of GaN and having a major surface with an off-axis angle of between 4.1° and 47.8° inclusive with respect to a {1-100} plane, a step (S40) of epitaxially growing a semiconductor layer made of GaN on the major surface of the starting substrate, and a step (S50) of picking out a GaN substrate having an m plane as the major surface from the semiconductor layer.
    Type: Application
    Filed: October 14, 2011
    Publication date: February 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Osada, Koji Uematsu, Seiji Nakahata, Fumitake Nakanishi
  • Publication number: 20110057197
    Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.
    Type: Application
    Filed: June 17, 2010
    Publication date: March 10, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke FUJIWARA, Koji Uematsu, Hideki Osada, Seiji Nakahata
  • Patent number: 7816238
    Abstract: A GaN substrate having a large diameter of two inches or more by which a semiconductor device such as a light emitting element with improved characteristics such as luminance efficiency, an operating life and the like can be obtained at low cost industrially, a substrate having an epitaxial layer formed on the GaN substrate, a semiconductor device, and a method of manufacturing the GaN substrate are provided. A GaN substrate has a main surface and contains a low-defect crystal region and a defect concentrated region adjacent to low-defect crystal region. Low-defect crystal region and defect concentrated region extend from the main surface to a back surface positioned on the opposite side of the main surface. A plane direction [0001] is inclined in an off-angle direction with respect to a normal vector of the main surface.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 19, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Osada, Hitoshi Kasai, Keiji Ishibashi, Seiji Nakahata, Takashi Kyono, Katsushi Akita, Yoshiki Miura
  • Publication number: 20100220761
    Abstract: A gallium nitride-based semiconductor optical device is provided that includes an indium-containing gallium nitride-based semiconductor layer that exhibit low piezoelectric effect and high crystal quality. The gallium nitride-based semiconductor optical device 11a includes a GaN support base 13, a GaN-based semiconductor region 15, and well layers 19. A primary surface 13a tilts from a surface orthogonal to a reference axis that extends in a direction from one crystal axis of the m-axis and the a-axis of GaN toward the other crystal axis. The tilt angle AOFF is equal to the angle defined by a vector VM and a vector VN. The inclination of the primary surface is shown by a typical m-plane SM and m-axis vector VM. The GaN-based semiconductor region 15 is provided on the primary surface 13a. In the well layers 19 in an active layer 17, both the m-plane and the a-plane of the well layers 19 tilt from a normal axis AN of the primary surface 13a. The indium content of the well layers 19 is 0.1 or more.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 2, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Hideki OSADA, Keiji ISHIBASHI, Katsushi AKITA, Masaki UENO
  • Publication number: 20080308906
    Abstract: A GaN substrate having a large diameter of two inches or more by which a semiconductor device such as a light emitting element with improved characteristics such as luminance efficiency, an operating life and the like can be obtained at low cost industrially, a substrate having an epitaxial layer formed on the GaN substrate, a semiconductor device, and a method of manufacturing the GaN substrate are provided. A GaN substrate has a main surface and contains a low-defect crystal region and a defect concentrated region adjacent to low-defect crystal region. Low-defect crystal region and defect concentrated region extend from the main surface to a back surface positioned on the opposite side of the main surface. A plane direction [0001] is inclined in an off-angle direction with respect to a normal vector of the main surface.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 18, 2008
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki OSADA, Hitoshi Kasai, Keiji Ishibashi, Seiji Nakahata, Takashi Kyono, Katsushi Akita, Yoshiki Miura
  • Patent number: 7047742
    Abstract: The turbocharged engine in accordance with the present invention comprises an EGR unit having an EGR passage linking an intake passage and an exhaust passage and an EGR valve provided in the EGR passage. The engine further comprises deceleration deciding unit for deciding as to whether a vehicle decelerates, and intake air release unit for opening the EGR valve and causing part of the intake air present in the intake passage to flow into the exhaust passage through the EGR passage when the deceleration deciding unit decides that the vehicle is decelerating.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: May 23, 2006
    Assignee: Isuzu Motors Limited
    Inventors: Kazutoshi Kono, Kenji Hatano, Shinichiro Kawai, Hideki Osada
  • Publication number: 20040244375
    Abstract: The turbocharged engine in accordance with the present invention comprises an EGR unit having an EGR passage linking an intake passage and an exhaust passage and an EGR valve provided in the EGR passage. The engine further comprises deceleration deciding unit for deciding as to whether a vehicle decelerates, and intake air release unit for opening the EGR valve and causing part of the intake air present in the intake passage to flow into the exhaust passage through the EGR passage when the deceleration deciding unit decides that the vehicle is decelerating.
    Type: Application
    Filed: May 26, 2004
    Publication date: December 9, 2004
    Applicant: Isuzu Motors Limited
    Inventors: Kazutoshi Kono, Kenji Hatano, Shinichiro Kawai, Hideki Osada