Patents by Inventor Hideki Shiono

Hideki Shiono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8086770
    Abstract: In a communication apparatus, a write controller writes received data in a temporary memory which serves as short-time storage. A read controller reads data out of the temporary memory. A discard controller controls discard operation of the data read out of the temporary memory.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: December 27, 2011
    Assignee: Fujitsu Limited
    Inventors: Takanori Yasui, Hideki Shiono, Hirofumi Fujiyama, Satoshi Tomie, Kenji Fukunaga, Tamotsu Matsuo
  • Publication number: 20090300296
    Abstract: In a communication apparatus, a write controller writes received data in a temporary memory which serves as short-time storage. A read controller reads data out of the temporary memory. A discard controller controls discard operation of the data read out of the temporary memory.
    Type: Application
    Filed: January 28, 2009
    Publication date: December 3, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Takanori Yasui, Hideki Shiono, Hirofumi Fujiyama, Satoshi Tomie, Kenji Fukunaga, Tamotsu Matsuo
  • Publication number: 20090003205
    Abstract: A method for a load distribution control of packet transmission includes calculating bandwidths of individual physical ports at a time when inputted packets are distributed to the plurality of physical ports, using each of a plurality of hash calculation formulas; selecting one of the hash calculation formulas so that the calculated bandwidths of the packets for the respective physical ports may become uniform; and distributing and delivering the packets to the respective physical ports using the updated hash calculation formula.
    Type: Application
    Filed: June 23, 2008
    Publication date: January 1, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi Tomie, Hideki Shiono, Masaki Hiromori, Takanori Yasui, Sadayoshi Handa, Hirohumi Fujiyama
  • Patent number: 7415111
    Abstract: An optical network unit and an optical line terminal which efficiently control the data receiving and dechurning processes in a passive optical network. In a churning parameter memory subsystem, a first memory bank stores churning parameters that are currently used, while a second memory bank stores updates made to the churning parameters. Under the control of the churning parameter memory subsystem, those first and second memory banks change their roles with each other at a churning key updating time point. A data dechurning unit receives a data stream consisting of a plurality of frames and dechurns the information contained in the data stream, according to the stored churning parameters. When an update is done to the parameters in a certain frame, the data dechurning unit makes the update effective at the next frame, thus starting data dechurning operations from the next frame.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: August 19, 2008
    Assignee: Fujitsu Limited
    Inventors: Takashi Monzawa, Kenji Miura, Tamotsu Matsuo, Hideki Shiono, Yoshimi Toyoda, Toshinori Koyanagi, Setsuo Abiru, Jun Asato, Shinichi Fujiyoshi, Kazuhiro Uchida, Kazuya Ryu, Katsuhiko Hirashima, Tateo Shimaru, Mitsuharu Wakayoshi, Toshiyuki Sakai
  • Publication number: 20080077741
    Abstract: A dynamic memory management method and apparatus wherein an area of a memory is partitioned into a plurality of areas to form memory banks. The different priority classes share the memory banks. A policer (write controller) dynamically assigns input frame data of a plurality of classes having different degrees of priority to memory banks in accordance with the degrees of priority and stores the data there for each priority class. A scheduler (read controller) sequentially reads out the data from the frame data stored in the memory bank assigned to the class having the highest degree of priority and transmits the same. For storage of frame data of a priority of class input in a burst like manner, a plurality of memory banks are assigned to that priority class so as to raise the burst tolerance. By controlling writing and reading of data in units of memory banks, the control can be simplified. Due to this, the efficiency of usage of memory is improved and the write/read control is simplified.
    Type: Application
    Filed: July 30, 2007
    Publication date: March 27, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takanori Yasui, Hideki Shiono, Masaki Hiromori, Hirofumi Fujiyama, Satoshi Tomie, Yasuhiro Yamauchi, Sadayoshi Handa
  • Publication number: 20070223386
    Abstract: In a monitoring device and system, a monitoring data inserter inserts monitoring data of a predetermined pattern into an idle period of input data to be transmitted to a transmission line. A monitoring data checker having received the monitoring data through the transmission line, when determining that the monitoring data does not maintain the predetermined pattern, provides selective switchover instructions to a selector to be controlled. Then, the monitoring data checker sequentially performs a selective switchover to processors, thereby detecting a failure point in the processors. Also, when the failure point in the processors can not be detected, the monitoring data checker provides channel switchover instructions to a switching portion and performs a channel switchover of the transmission line, thereby detecting which channel of the transmission line has caused a failure.
    Type: Application
    Filed: August 11, 2006
    Publication date: September 27, 2007
    Inventors: Takanori Yasui, Hideki Shiono, Masaki Hiromori, Hirofumi Fujiyama, Satoshi Tomie
  • Publication number: 20050058139
    Abstract: An optical network unit and an optical line terminal which efficiently control the data receiving and dechurning processes in a passive optical network. In a churning parameter memory subsystem, a first memory bank stores churning parameters that are currently used, while a second memory bank stores updates made to the churning parameters. Under the control of the churning parameter memory subsystem, those first and second memory banks change their roles with each other at a churning key updating time point. A data dechurning unit receives a data stream consisting of a plurality of frames and dechurns the information contained in the data stream, according to the stored churning parameters. When an update is done to the parameters in a certain frame, the data dechurning unit makes the update effective at the next frame, thus starting data dechurning operations from the next frame.
    Type: Application
    Filed: October 7, 2004
    Publication date: March 17, 2005
    Inventors: Takashi Monzawa, Kenji Miura, Tamotsu Matsuo, Hideki Shiono, Yoshimi Toyoda, Toshinori Koyanagi, Setsuo Abiru, Jun Asato, Shinichi Fujiyoshi, Kazuhiro Uchida, Kazuya Ryu, Katsuhiko Hirashima, Tateo Shimaru, Mitsuharu Wakayoshi, Toshiyuki Sakai
  • Patent number: 6848053
    Abstract: An optical network unit and an optical line terminal which efficiently control the data receiving and dechurning processes in a passive optical network. In a churning parameter memory subsystem, a first memory bank stores churning parameters that are currently used, while a second memory bank stores updates made to the churning parameters. Under the control of the churning parameter memory subsystem, those first and second memory banks change their roles with each other at a churning key updating time point. A data dechurning unit receives a data stream consisting of a plurality of frames and dechurns the information contained in the data stream, according to the stored churning parameters. When an update is done to the parameters in a certain frame, the data dechurning unit makes the update effective at the next frame, thus starting data dechurning operations from the next frame.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: January 25, 2005
    Assignee: Fujitsu Limited
    Inventors: Takashi Monzawa, Kenji Miura, Tamotsu Matsuo, Hideki Shiono, Yoshimi Toyoda, Toshinori Koyanagi, Setsuo Abiru, Jun Asato, Shinichi Fujiyoshi, Kazuhiro Uchida, Kazuya Ryu, Katsuhiko Hirashima, Tateo Shimaru, Mitsuharu Wakayoshi, Toshiyuki Sakai
  • Patent number: 6795398
    Abstract: In an ATM cell multiplexer which multiplexes ATM cells outputted from a plurality of cards, sequential cell arrival numbers common to the ATM cells outputted from a plurality of cards are added to each of the cells to be written in memories, and the read side checks a sequentiality of the cell arrival numbers whereby the ATM cells are read in the order of arrival and the cell arrival number at that time is used as the cell arrival number to be checked at the next read time. Also, when any of the cards is pulled out, a card not pulled out is operated normally and an address counter of only the pulled-out card is cleared. Even when non-sequentiality of the cell arrival numbers occurs due to the clearance of the address counter, the maximum cell arrival number is set to the value which enables the oldest cells to be read first.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: September 21, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshimi Toyoda, Kenji Miura, Takashi Monzawa, Tamotsu Matsuo, Jun Asato, Hideki Shiono