Patents by Inventor Hideki Shutou

Hideki Shutou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5517066
    Abstract: A constant voltage drive type driver circuit includes a pulse transformer for outputting output pulses having a predetermined peak value and having primary and primary windings. The secondary winding has first and second terminals and an equivalent load impedance is connected to the secondary winding when viewed from the pulse transformer excluding an impedance of the secondary winding itself. A power source supplies a voltage, and a switching circuit supplies the voltage from the power source to the primary winding of the pulse transformer in a first mode and cuts off the supply of the voltage to the primary winding in a second mode in response to control signals. A short-circuiting part short-circuits the first and second terminals of the primary winding of the pulse transformer for a predetermined time from a time when the switching circuit assumes the second mode.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: May 14, 1996
    Assignee: Fujitsu Limited
    Inventors: Hideki Shutou, Osamu Kobayashi, Koji Ikeda
  • Patent number: 5132570
    Abstract: A programmable logic array with an extended logical scale includes a logic array part (21) which carries out a logic operation provided by a logic circuit for an input signal and provides an output signal indicative of an operation result. The logic array part includes semiconductor switching elements (22) provided at programmable logic array intersecting points, the logic operation of the logic circuit being changed by logic setting data supplied to the semiconductor switching elements. The structure further includes a storage circuit (23) which stores sets of logic setting data, and a setting circuit (24) which sequentially selects one of the sets of logic setting dated stored in the storage circuit and supplies the logic array part with the selected set of logic setting data.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: July 21, 1992
    Assignee: Fujitsu Limited
    Inventors: Hideki Shutou, Fumihiro Suenaga, Minoru Takeno
  • Patent number: 5091920
    Abstract: A threshold value control system for discriminating an input signal received by a receiver circuit is provided having a mode setting unit for determining a mode setting signal corresponding to a connection pattern of the receiver circuit. A variable threshold generating unit generates a variable threshold which varies depending on the variation of the level of the input signal. A constant threshold value generating unit generates at least one constant threshold by which the level of the input signal can be discriminated even when its level cannot be distinguished by the variable threshold value. A threshold comparing unit compares the variable threshold and each of the at least one constant threshold to output a comparison result.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: February 25, 1992
    Assignee: Fujitsu Limited
    Inventors: Koji Ikeda, Hideki Shutou