Patents by Inventor Hideki Takehara

Hideki Takehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140044171
    Abstract: A first vector predictor candidate list generating unit generates a first motion vector predictor candidate list from motion vectors of encoded neighboring blocks to blocks to be encoded. A second vector predictor candidate list generating unit generates a second motion vector predictor candidate list from motion vectors of blocks at the same positions as the blocks to be encoded in an encoded image and neighboring blocks to the blocks at the same positions. A combination determining unit determines whether to generate a third vector predictor candidate list combining the first and second vector predictor candidate lists by comparison of a block size of the blocks to be encoded and a threshold size. A vector predictor candidate list deciding unit generates the third vector predictor candidate list from the first vector predictor candidate list.
    Type: Application
    Filed: September 6, 2013
    Publication date: February 13, 2014
    Applicant: JVC KENWOOD CORPORATION
    Inventors: Hideki Takehara, Motoharu Ueda, Masayoshi Nishitani, Hiroya Nakamura, Satoru Sakazume, Kazumi Arakage, Shigeru Fukushima, Toru Kumakura
  • Patent number: 8067814
    Abstract: In the present invention, a first circuit pattern 3 composing a semiconductor element is formed on the front side of a substrate 1, a first insulating layer 2 is formed on the first circuit pattern 3, solder electrodes 5 for external connection are formed on the first insulating layer 2, a second insulating layer 6 is formed on the backside of the substrate 1, a second circuit pattern 7 is formed on the second insulating layer 6, through vias 8 are formed to connect the first circuit pattern 3 and the second circuit pattern 7, chip passive components 9 are placed on the second circuit pattern 7, and the backside of the substrate is integrally molded with epoxy resin 10 such that the epoxy resin 10 covers the chip passive components 9.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: November 29, 2011
    Assignee: Panasonic Corporation
    Inventors: Hideki Takehara, Kazuki Tateoka
  • Patent number: 8023277
    Abstract: The electronic component integrated module includes a wiring board; an electronic component provided on the wiring board; solder for electrically connecting the electronic component onto the wiring substrate; and an encapsulating resin for encapsulating the electronic component and the solder. The average linear thermal expansion coefficient ? of the encapsulating resin, which is calculated by using the glass transition temperature of the encapsulating resin, a linear thermal expansion coefficient ?1 obtained at a temperature lower than the glass transition temperature, a linear thermal expansion coefficient ?2 obtained at a temperature exceeding the glass transition temperature, room temperature, and a peak temperature of reflow packaging of the electronic component integrated module, is not less than 17×10?6/° C. and not more than 110×10?6/° C.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: September 20, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshiyuki Arai, Hideki Takehara
  • Patent number: 7960271
    Abstract: The present invention provides a semiconductor device that can suppresses poor connection caused by the variation of the heights of bumps during reflow heating, can be applied to a narrow array pitch, and can freely adjust the heights of the bumps.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: June 14, 2011
    Assignee: Panasonic Corporation
    Inventors: Hideki Takehara, Yoshihiro Tomita, Seiji Fujiwara, Takahiro Nakano, Hikari Sano
  • Patent number: 7876570
    Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: January 25, 2011
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Hideki Takehara, Yoshiyuki Arai, Toshiyuki Fukuda
  • Publication number: 20100014262
    Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.
    Type: Application
    Filed: September 24, 2009
    Publication date: January 21, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Masanori MINAMIO, Hideki TAKEHARA, Yoshiyuki ARAI, Toshiyuki FUKUDA
  • Patent number: 7606047
    Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: October 20, 2009
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Hideki Takehara, Yoshiyuki Arai, Toshiyuki Fukuda
  • Publication number: 20090065933
    Abstract: The present invention provides a semiconductor device that can suppresses poor connection caused by the variation of the heights of bumps during reflow heating, can be applied to a narrow array pitch, and can freely adjust the heights of the bumps.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 12, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Yoshihiro Tomita, Seiji Fujiwara, Takahiro Nakano, Hikari Sano
  • Publication number: 20080296735
    Abstract: In the present invention, a first circuit pattern 3 composing a semiconductor element is formed on the front side of a substrate 1, a first insulating layer 2 is formed on the first circuit pattern 3, solder electrodes 5 for external connection are formed on the first insulating layer 2, a second insulating layer 6 is formed on the backside of the substrate 1, a second circuit pattern 7 is formed on the second insulating layer 6, through vias 8 are formed to connect the first circuit pattern 3 and the second circuit pattern 7, chip passive components 9 are placed on the second circuit pattern 7, and the backside of the substrate is integrally molded with epoxy resin 10 such that the epoxy resin 10 covers the chip passive components 9.
    Type: Application
    Filed: May 28, 2008
    Publication date: December 4, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Kazuki Tateoka
  • Publication number: 20070216039
    Abstract: The electronic component integrated module includes a wiring board; an electronic component provided on the wiring board; solder for electrically connecting the electronic component onto the wiring substrate; and an encapsulating resin for encapsulating the electronic component and the solder. The average linear thermal expansion coefficient ? of the encapsulating resin, which is calculated by using the glass transition temperature of the encapsulating resin, a linear thermal expansion coefficient ?1 obtained at a temperature lower than the glass transition temperature, a linear thermal expansion coefficient ?2 obtained at a temperature exceeding the glass transition temperature, room temperature, and a peak temperature of reflow packaging of the electronic component integrated module, is not less than 17×106/° C. and not more than 110×10?6/° C.
    Type: Application
    Filed: March 2, 2007
    Publication date: September 20, 2007
    Inventors: Yoshiyuki Arai, Hideki Takehara
  • Publication number: 20070086174
    Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.
    Type: Application
    Filed: July 19, 2006
    Publication date: April 19, 2007
    Inventors: Masanori Minamio, Hideki Takehara, Yoshiyuki Arai, Toshiyuki Fukuda
  • Patent number: 7125744
    Abstract: In the high-frequency module of the present invention, an insulating resin is formed so as to seal a high-frequency semiconductor element mounted on a surface of a substrate and further to seal electronic components. Furthermore, a metal thin film is formed on the surface of the insulating resin. This metal thin film provides an electromagnetic wave shielding effect.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: October 24, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa
  • Patent number: 7081661
    Abstract: In the high-frequency module of the present invention, an insulating resin is formed so as to seal a high-frequency semiconductor element mounted on a surface of a substrate and further to seal electronic components. Furthermore, a metal thin film is formed on the surface of the insulating resin. This metal thin film provides an electromagnetic wave shielding effect.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: July 25, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa
  • Patent number: 6890800
    Abstract: One side of a ceramic multilayer board is attached to a resin film with adhesive, the resin film is mounted on a mold for resin sealing having a cavity provided in desired position, the position of the board is controlled by pressing against a portion of the resin film by a portion of the mold for sealing, and thereafter sealing is conducted by filling an epoxy resin into the cavity. The thus prepared semiconductor device has a rear face on which electrodes for connecting to outside are exposed, and the sealing resin is formed so as to be flush with respect to the rear face of the board, surround the periphery of the board, and form a cross section in a rectangular shape. With this configuration, the semiconductor device free from a crack can be sealed with resin.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: May 10, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Susumu Tsumura
  • Publication number: 20050056925
    Abstract: In the high-frequency module of the present invention, an insulating resin is formed so as to seal a high-frequency semiconductor element mounted on a surface of a substrate and further to seal electronic components. Furthermore, a metal thin film is formed on the surface of the insulating resin. This metal thin film provides an electromagnetic wave shielding effect.
    Type: Application
    Filed: October 6, 2004
    Publication date: March 17, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa
  • Publication number: 20050040522
    Abstract: A high-frequency semiconductor device is provided with a ceramic substrate, an element group including semiconductor elements and passive components mounted onto a bottom portion of the ceramic substrate, and a composite resin material layer formed on the bottom portion of the ceramic substrate so as to bury the element group. The composite resin material layer is formed by a composite resin material including an epoxy resin and an inorganic filler material, and has a flat bottom surface on which electrodes for connecting to the outside are formed. As packaging of a structure in which the receiving system and the transmitting system are formed in a single unit, such as an RF module, the high-frequency semiconductor device achieves a small size, a high mounting density, and excellent heat release properties.
    Type: Application
    Filed: October 7, 2004
    Publication date: February 24, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa, Seiichi Nakatani
  • Patent number: 6818979
    Abstract: A high-frequency semiconductor device is provided with a ceramic substrate, an element group including semiconductor elements and passive components mounted onto a bottom portion of the ceramic substrate, and a composite resin material layer formed on the bottom portion of the ceramic substrate so as to bury the element group. The composite resin material layer is formed by a composite resin material including an epoxy resin and an inorganic filler material, and has a flat bottom surface on which electrodes for connecting to the outside are formed. As packaging of a structure in which the receiving system and the transmitting system are formed in a single unit, such as an RF module, the high-frequency semiconductor device achieves a small size, a high mounting density, and excellent heat release properties.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: November 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa, Seiichi Nakatani
  • Patent number: 6815810
    Abstract: A high-frequency semiconductor device is provided with a ceramic substrate, an element group including semiconductor elements and passive components mounted onto a bottom portion of the ceramic substrate, and a composite resin material layer formed on the bottom portion of the ceramic substrate so as to bury the element group. The composite resin material layer is formed by a composite resin material including an epoxy resin and an inorganic filler material, and has a flat bottom surface on which electrodes for connecting to the outside are formed. As packaging of a structure in which the receiving system and the transmitting system are formed in a single unit, such as an RF module, the high-frequency semiconductor device achieves a small size, a high mounting density, and excellent heat release properties.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Noriyuki Yoshikawa, Kunihiko Kanazawa, Seiichi Nakatani
  • Patent number: 6794747
    Abstract: The present invention provides a semiconductor device comprising as a core substrate a high thermo conductive ceramic substrate having circuit patterns on opposed surfaces. The high thermo conductive ceramic substrate has on one surface a first circuit board of at least one layer having a first cavity structure, and on the other surface a second circuit board of at least one layer having a second cavity structure. A first active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the first cavity, a second active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the second cavity, an external electrode is integrated with the surface of the second circuit board, and the first circuit board surface is equipped with a cap or sealed with resin.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: September 21, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Takehara, Kunihiko Kanazawa, Noriyuki Yoshikawa
  • Publication number: 20040041256
    Abstract: The present invention provides a semiconductor device comprising as a core substrate a high thermo conductive ceramic substrate having circuit patterns on opposed surfaces. The high thermo conductive ceramic substrate has on one surface a first circuit board of at least one layer having a first cavity structure, and on the other surface a second circuit board of at least one layer having a second cavity structure. A first active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the first cavity, a second active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the second cavity, an external electrode is integrated with the surface of the second circuit board, and the first circuit board surface is equipped with a cap or sealed with resin.
    Type: Application
    Filed: August 26, 2003
    Publication date: March 4, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideki Takehara, Kunihiko Kanazawa, Noriyuki Yoshikawa