Patents by Inventor Hideki Toki

Hideki Toki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6114866
    Abstract: A semiconductor device test board solves a problem with conventional test boards in that test results obtained through a burn-in procedure could be identified only before the test board is taken out of a burn-in oven. Hence, conventional test boards required additional steps for checking the test results after removing the test boards from the burn-in oven. This extra step prevents the efficiency of the test from being improved. One embodiment of the present test board has indicator arms, each rotatably mounted on a pivot on the test board, for indicating, in response to a signal on a signal line, the test result of the semiconductor device associated with it. Each of the indicator arms maintains its rest position when no failure has occurred in the semiconductor device associated with it during the test.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: September 5, 2000
    Assignees: Mitsubishi Electric Systems LSI Design Corporation, Mitsubishi Denki Kabushiki
    Inventors: Masaaki Matsuo, Tsuyoshi Saitoh, Takekazu Yamashita, Michio Nakajima, Akira Kitaguchi, Hideki Toki
  • Patent number: 6092227
    Abstract: A test circuit includes a writing unit that outputs m-bit data captured upon receipt of a clock signal, branches the m-bit data n identical m-bit data signals, and stores the n m-bit data signals in a memory device. A function determining unit reads the n m-bit data signals from the memory, compares one of the n m-bit data signals to an m-bit expected value, and determines coincidence or non-coincidence between the n m-bit data signal and an expected value.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: July 18, 2000
    Assignees: Mitsubishi Electric System LSI Design Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideki Toki, Akira Kitaguchi, Makoto Hatakenaka, Kiyoyuki Shiroshima, Masaaki Matsuo, Tsuyoshi Saitoh
  • Patent number: 5973953
    Abstract: A semiconductor memory device is constituted such that, when a first wiring layer provides a bit line of a first common complementary data line pair and a third wiring layer provides a bit line of a second common complementary data line pair, a second wiring layer makes an overlapped area between the bit line and the bit bar line of the second common complementary dada line pair equal to the bit line of the first common complementary data line pair and also an overlapped area between the bit line and the bit bar line of the first common complementary data line pair equal to the bit line of the second common complementary data line pair.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: October 26, 1999
    Assignees: Mitsubishi Electric System LSI Design Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takekazu Yamashita, Kiyoyuki Shiroshima, Michio Nakajima, Makoto Hatakenaka, Hideki Toki, Tuyoshi Saitoh