Patents by Inventor Hideki Tominaga
Hideki Tominaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10046328Abstract: Provided is a jaw crusher driving device in which a driving torque can be transmitted reliably to a rotation driving shaft to perform a crushing operation by strongly fixing a hydraulic pressure motor between a body frame of a jaw crusher and a flywheel. The jaw crusher includes a fixed tooth, a movable tooth, a rotation driving shaft rotatably supported on a body frame, and a pair of flywheels provided in the rotation driving shaft. The driving device includes: a hydraulic pressure motor in which a rotation shaft portion can rotate in relation to a motor body when pressure fluid is supplied; a connector for connecting one flywheel of the pair of flywheels and the rotation shaft portion; and a torque arm provided between the body frame and the motor body so as to prevent the motor body from rotating about an axis of the rotation driving shaft.Type: GrantFiled: February 24, 2015Date of Patent: August 14, 2018Assignee: NAKAYAMA IRON WORKS, LTD.Inventors: Hiroshi Nakayama, Hideki Tominaga
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Publication number: 20170336254Abstract: A photodetector includes a plurality of photoelectric conversion elements arranged within a photosensitive-element area constituting one photosensitive element; the plurality of detection circuits each of which is provided for one of the plurality of photoelectric conversion elements, each of the detection circuits including a capacitor; and a signal processing section for totaling output signals produced by the plurality of detection circuits.Type: ApplicationFiled: July 8, 2015Publication date: November 23, 2017Applicant: SHIMADZU CORPORATIONInventors: Ryuta HIROSE, Tomohiro KARASAWA, Hideki TOMINAGA
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Patent number: 9429471Abstract: A plurality of photodiodes arrayed in a one-dimensional form are divided into a plurality of groups. The structure of an antireflection coating is changed for each group so that all the surfaces of the photodiodes belonging to each group are covered with an antireflection coating having a transmittance characteristic which shows a maximum transmittance within a range of wavelengths of light to be received by those photodiodes. In particular, a SiO2 coating layer on the silicon substrate and an Al2O3 coating layer are common to all the photodiodes, while the structure of the upper layers are modified with respect to the wavelength. Within an ultraviolet wavelength region, the coating structure is more finely changed with respect to the wavelength. By such a design, the transmittance can be improved while making the best efforts to avoid a complex manufacturing process.Type: GrantFiled: March 26, 2013Date of Patent: August 30, 2016Assignees: SHIMADZU CORPORATION, TOHOKU UNIVERSITYInventors: Hideki Tominaga, Ryuta Hirose, Kenji Takubo, Shigetoshi Sugawa, Rihito Kuroda
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Patent number: 9420210Abstract: A burst reading memory section (200) and continuous reading memory section (210) are independently provided for each of the two-dimensionally arrayed pixels (10). The burst reading memory section (200) has capacitors (25001-25104) capable of holding a plurality of signals. The continuous reading memory section (210) has only one capacitor 213. Signal output lines for the two memory sections are separately provided. When a signal produced by photoelectric conversion at the pixel (10) is outputted on a pixel output line (14), the signal can be simultaneously written in the capacitors at both memory sections (200, 201), after which the signals can be separately extracted to the outside at different timings. Therefore, a series of images taken at extremely short intervals of time during a short period of time can be obtained at an arbitrary timing without impeding a continuous image-acquiring operation at a low frame rate.Type: GrantFiled: June 10, 2009Date of Patent: August 16, 2016Assignees: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20150296160Abstract: A logical gate circuit (5) and four stages of flip flips (4a-4d) are assigned to each pixel (1). A controller (7) inputs four phase identification signals into the logical gate circuit (5) and also inputs a start signal STR into a shift register (4) synchronously with the four mutually different phases defined by the phase identification signals. During one round of scanning all the pixels (1) for a readout control, if an enable signal ENBL is set to “0” while an output of a phase identification circuit (110) is “1”, a charge accumulation time at the pixel (1) concerned becomes equal to a readout period T. If the enable signal ENBL is set to “1” while the output of the phase identification circuit (110) is “1”, electric charges accumulated in a photodiode (11) until that point are entirely discarded, so that the charge accumulation time becomes shorter than the readout period T.Type: ApplicationFiled: October 28, 2013Publication date: October 15, 2015Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Hideki Tominaga, Ryuta Hirose, Kenji Takubo, Shigetoshi Sugawa, Rihito Kuroda
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Publication number: 20150238970Abstract: Provided is a jaw crusher driving device in which a driving torque can be transmitted reliably to a rotation driving shaft to perform a crushing operation by strongly fixing a hydraulic pressure motor between a body frame of a jaw crusher and a flywheel. The jaw crusher includes a fixed tooth, a movable tooth, a rotation driving shaft rotatably supported on a body frame, and a pair of flywheels provided in the rotation driving shaft. The driving device includes: a hydraulic pressure motor in which a rotation shaft portion can rotate in relation to a motor body when pressure fluid is supplied; a connector for connecting one flywheel of the pair of flywheels and the rotation shaft portion; and a torque arm provided between the body frame and the motor body so as to prevent the motor body from rotating about an axis of the rotation driving shaft.Type: ApplicationFiled: February 24, 2015Publication date: August 27, 2015Applicant: NAKAYAMA IRON WORKS, LTD.Inventors: Hiroshi Nakayama, Hideki Tominaga
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Patent number: 9030582Abstract: A transistor (24) which acts as a load-current source for a source follower amplifying transistor (22) for outputting a pixel signal to a pixel output line (40) is provided in each picture element (10), whereby a high bias current is prevented from passing through the high-resistance pixel output line (40), so that a variation in an offset voltage among picture elements is suppressed. Inclusion of the high-resistance pixel output line (40) into the source follower amplification circuit is also avoided, whereby the gain characteristics are prevented from deterioration. Thus, the S/N ratio of the picture element is improved so as to enhance the quality of the images.Type: GrantFiled: February 8, 2011Date of Patent: May 12, 2015Assignees: Shimadzu Corporation, Tohoku UniversityInventors: Shigetoshi Sugawa, Hideki Tominaga, Kenji Takubo, Yasushi Kondo
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Patent number: 8988571Abstract: A pixel area with a two-dimensional array of pixels (10) each including a photodiode and a memory area (3a) on which memory sections for holding signals produced by the pixels for continuously recordable frames are separately provided on a semiconductor substrate. All the pixels simultaneously perform a photocharge storage operation, and the signals produced by the photocharge storage are extracted in parallel through mutually independent pixel output lines (14). In a plurality of memory sections connected to one pixel output line, a sample-and-hold transistor of a different memory section is turned on for each exposure cycle so as to sequentially hold signals in a capacitor of each memory section. After the continuous imaging is completed, all the pixel are sequentially read. Unlike CCD cameras, the present sensor does not simultaneously drive all the gate loads. Therefore, the sensor consumes less power yet can be driven at high speeds.Type: GrantFiled: September 4, 2008Date of Patent: March 24, 2015Assignees: Tohoku University, Shimadzu CorporationInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20150048239Abstract: A plurality of photodiodes arrayed in a one-dimensional form are divided into a plurality of groups. The structure of an antireflection coating is changed for each group so that all the surfaces of the photodiodes belonging to each group are covered with an antireflection coating having a transmittance characteristic which shows a maximum transmittance within a range of wavelengths of light to be received by those photodiodes. In particular, a SiO2 coating layer on the silicon substrate and an Al2O3 coating layer are common to all the photodiodes, while the structure of the upper layers are modified with respect to the wavelength. Within an ultraviolet wavelength region, the coating structure is more finely changed with respect to the wavelength. By such a design, the transmittance can be improved while making the best efforts to avoid a complex manufacturing process.Type: ApplicationFiled: March 26, 2013Publication date: February 19, 2015Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Hideki Tominaga, Ryuta Hirose, Kenji Takubo, Shigetoshi Sugawa, Rihito Kuroda
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Publication number: 20130308023Abstract: A transistor (24) which acts as a load-current source for a source follower amplifying transistor (22) for outputting a pixel signal to a pixel output line (40) is provided in each picture element (10), whereby a high bias current is prevented from passing through the high-resistance pixel output line (40), so that a variation in an offset voltage among picture elements is suppressed. Inclusion of the high-resistance pixel output line (40) into the source follower amplification circuit is also avoided, whereby the gain characteristics are prevented from deterioration. Thus, the S/N ratio of the picture element is improved so as to enhance the quality of the images.Type: ApplicationFiled: February 8, 2011Publication date: November 21, 2013Applicants: Shimadzu Corporation, Tohoku UniversityInventors: Shigetoshi Sugawa, Hideki Tominaga, Kenji Takubo, Yasushi Kondo
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Patent number: 8569805Abstract: A floating diffusion (331) is created substantially at center of the light-receiving surface of an embedded photodiode (31), with a gate electrode of a transfer transistor (32) surrounding the floating diffusion. The concentration (or depth) of impurities in a p+-type semiconductor region, n-type semiconductor region or p-well region is changed in an inclined form so that a potential gradient being inclined downwards from the circumference to the center is created when an appropriate bias voltage is applied to the pn junction. The photocharges produced by incident light are rapidly moved along the potential gradient toward the center. Even in the case where the photocharge storage time is short, the photocharges can be efficiently collected since the maximum moving distance from the circumference of the photodiode (31) to the floating diffusion (331). Thus, the photocharges produced by the photodiode (31) are efficiently utilized, whereby the detection sensitivity is improved.Type: GrantFiled: September 4, 2008Date of Patent: October 29, 2013Assignees: Tohoku University, Shimadu CorporationInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Patent number: 8541731Abstract: A pixel output line is provided for each of the pixels two-dimensionally arrayed in a pixel area. The pixel output lines are extended to a memory area, and a memory unit is connected to each of those lines. The memory unit includes a writing-side transistor, a reading-side transistor and a plurality of memory sections for holding signals for 104 image frames. A photocharge storage operation is simultaneously performed at all the pixels, and the thereby produced signals are outputted to the pixel output lines. In the memory unit, with the writing-side transistor in the ON state, the sampling transistor of a different memory section is sequentially turned on for each exposure cycle so as to sequentially hold a signal in the capacitor of each memory section. After a burst imaging operation is completed, all the pixel signals are sequentially read. Unlike CCDs, the present device does not simultaneously drive all gate loads, so that it can be driven at high speeds with low power consumption.Type: GrantFiled: June 10, 2009Date of Patent: September 24, 2013Assignees: Shimadzu Corporation, Tohoku UniversityInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Patent number: 8530947Abstract: A floating diffusion region is formed at an edge of a light-receiving surface of an embedded photodiode, with a transfer gate electrode located therebetween. A first region, with radially extending portions centered on the FD region, and a second region, located to the outside of the first region, are created in the substantially sector-shaped light-receiving surface. A dopant whose conductivity type is the same as the signal charges to be collected in the first region are introduced, whereby an electric field for moving the signal charges from the radially extending sections towards the center is created due to a three-dimensional field effect. As a result, the charge-transfer time is reduced. Additionally, since a circuit element in the subsequent stage can be placed adjacent to the floating diffusion region, the parasitic capacitance of the floating diffusion region can be reduced and a highly sensitive element can be obtained.Type: GrantFiled: June 23, 2010Date of Patent: September 10, 2013Assignees: Shimadzu Corporation, Tohoku UniversityInventors: Yasushi Kondo, Hideki Tominaga, Kenji Takubo, Ryuta Hirose, Shigetoshi Sugawa, Hideki Mutoh
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Patent number: 8482640Abstract: An independent pixel output line (14) is provided for each of two-dimensionally arranged pixels (10) within a pixel area (2a). A plurality of memory sections are connected to each pixel output line (14). In a continuous reading mode, photocharge storage is simultaneously performed at all the pixels, and signals are collectively transferred from the pixels (10) through the pixel output lines (14) to the memory sections, after which the signals held in the memory sections are sequentially read and outputted. In a burst reading mode, the operations of simultaneously storing photocharges at all the pixels and collectively transferring signals from each pixel (10) through the pixel output line (14) to the memory sections are sequentially performed for each of the memory sections to hold signals corresponding to a plurality of frames.Type: GrantFiled: September 4, 2008Date of Patent: July 9, 2013Assignees: Tohoku University, Shimadzu CorporationInventors: Shigetoshi Sugaw, Yasushi Kondo, Hideki Tominaga
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Patent number: 8269838Abstract: A pixel output line (14) is independently provided for each of the pixels arranged in a two-dimensionally array within a pixel area so that pixel signals can be sequentially written in a plurality of memory sections (22) through the pixel output lines (14). When a plurality of frames of pixel signals are held in the memory sections (22), the pixel signals corresponding to two arbitrarily selected frames are read and respectively stored in sample-and-hold circuits (61 and 62), and their difference is obtained. Then, the difference signals corresponding to a predetermined range of the image are integrated, and the integrated value is compared with a threshold. If the integrated value exceeds the threshold, it is presumed that a change in an imaging object has occurred, and a pulse generation circuit (66) generates a trigger signal.Type: GrantFiled: September 4, 2008Date of Patent: September 18, 2012Assignees: Tohoku University, Shimadzu CorporationInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20120112255Abstract: A floating diffusion region is formed at an edge of a light-receiving surface of an embedded photodiode, with a transfer gate electrode located therebetween. A first region, with radially extending portions centered on the FD region, and a second region, located to the outside of the first region, are created in the substantially sector-shaped light-receiving surface. A dopant whose conductivity type is the same as the signal charges to be collected in the first region are introduced, whereby an electric field for moving the signal charges from the radially extending sections towards the center is created due to a three-dimensional field effect. As a result, the charge-transfer time is reduced. Additionally, since a circuit element in the subsequent stage can be placed adjacent to the floating diffusion region, the parasitic capacitance of the floating diffusion region can be reduced and a highly sensitive element can be obtained.Type: ApplicationFiled: June 23, 2010Publication date: May 10, 2012Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Yasushi Kondo, Hideki Tominaga, Kenji Takubo, Ryuta Hirose, Shigetoshi Sugawa, Hideki Mutoh
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Publication number: 20110084197Abstract: A pixel output line is provided for each of the pixels two-dimensionally arrayed in a pixel area. The pixel output lines are extended to a memory area, and a memory unit is connected to each of those lines. The memory unit includes a writing-side transistor, a reading-side transistor and a plurality of memory sections for holding signals for 104 image frames. A photocharge storage operation is simultaneously performed at all the pixels, and the thereby produced signals are outputted to the pixel output lines. In the memory unit, with the writing-side transistor in the ON state, the sampling transistor of a different memory section is sequentially turned on for each exposure cycle so as to sequentially hold a signal in the capacitor of each memory section. After a burst imaging operation is completed, all the pixel signals are sequentially read. Unlike CCDs, the present device does not simultaneously drive all gate loads, so that it can be driven at high speeds with low power consumption.Type: ApplicationFiled: June 10, 2009Publication date: April 14, 2011Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20110085066Abstract: A burst reading memory section (200) and continuous reading memory section (210) are independently provided for each of the two-dimensionally arrayed pixels (10). The burst reading memory section (200) has capacitors (25001-25104) capable of holding a plurality of signals. The continuous reading memory section (210) has only one capacitor 213. Signal output lines for the two memory sections are separately provided. When a signal produced by photoelectric conversion at the pixel (10) is outputted on a pixel output line (14), the signal can be simultaneously written in the capacitors at both memory sections (200, 201), after which the signals can be separately extracted to the outside at different timings. Therefore, a series of images taken at extremely short intervals of time during a short period of time can be obtained at an arbitrary timing without impeding a continuous image-acquiring operation at a low frame rate.Type: ApplicationFiled: June 10, 2009Publication date: April 14, 2011Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20100208115Abstract: A pixel area with a two-dimensional array of pixels (10) each including a photodiode and a memory area (3a) on which memory sections for holding signals produced by the pixels for continuously recordable frames are separately provided on a semiconductor substrate. All the pixels simultaneously perform a photocharge storage operation, and the signals produced by the photocharge storage are extracted in parallel through mutually independent pixel output lines (14). In a plurality of memory sections connected to one pixel output line, a sample-and-hold transistor of a different memory section is turned on for each exposure cycle so as to sequentially hold signals in a capacitor of each memory section. After the continuous imaging is completed, all the pixel are sequentially read. Unlike CCD cameras, the present sensor does not simultaneously drive all the gate loads. Therefore, the sensor consumes less power yet can be driven at high speeds.Type: ApplicationFiled: September 4, 2008Publication date: August 19, 2010Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATIONInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
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Publication number: 20100188538Abstract: An independent pixel output line (14) is provided for each of two-dimensionally arranged pixels (10) within a pixel area (2a). A plurality of memory sections are connected to each pixel output line (14). In a continuous reading mode, photocharge storage is simultaneously performed at all the pixels, and signals are collectively transferred from the pixels (10) through the pixel output lines (14) to the memory sections, after which the signals held in the memory sections are sequentially read and outputted. In a burst reading mode, the operations of simultaneously storing photocharges at all the pixels and collectively transferring signals from each pixel (10) through the pixel output line (14) to the memory sections are sequentially performed for each of the memory sections to hold signals corresponding to a plurality of frames.Type: ApplicationFiled: September 4, 2008Publication date: July 29, 2010Applicant: TOHOKU UNIVERSITYInventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga