Patents by Inventor Hideki Tomozawa

Hideki Tomozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8022419
    Abstract: A flip-chip type semiconductor light-emitting device having a positive electrode and a negative electrode similar in electrode area and capable of preventing the misalignment of the light-emitting device by utilizing the self alignment effect in manufacturing a light-emitting diode lamp and a printed circuit board for the flip-chip type semiconductor light-emitting device are provided. Furthermore, adopted are a flip-chip type semiconductor light-emitting device 1 which is provided with a negative electrode pad and a positive electrode pad formed on the side opposite the transparent substrate side of the semiconductor layer, wherein each of the electrode pads is formed in the same shape as each other and a printed circuit board for the light-emitting device has a pair of the electrode patterns which are formed in the same shape as each other. Still furthermore, a soldering film is included in each of the electrode pads.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: September 20, 2011
    Assignee: Showa Denko K.K.
    Inventors: Takaki Yasuda, Hideki Tomozawa
  • Patent number: 7855386
    Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: December 21, 2010
    Assignee: Showa Denko K.K.
    Inventors: Akira Bandoh, Hiromitsu Sakai, Masato Kobayakawa, Mineo Okuyama, Hideki Tomozawa, Hisayuki Miki, Joseph Gaze, Syunji Horikawa, Tetsuo Sakurai
  • Patent number: 7781777
    Abstract: A pn junction type Group III nitride semiconductor light-emitting device 10 (11) of the present invention has a light-emitting layer 2 of multiple quantum well structure in which well layers 22 and barrier layers 21 including Group III nitride semiconductors are alternately stacked periodically between an n-type clad layer 105 and a p-type clad layer 107 which are formed on a crystal substrate and which include Group III nitride semiconductors, in which one end layer 21m of the light-emitting layer 2 is closest to and opposed to the n-type clad layer, and the other end layer 21n of the light-emitting layer 2 is closest to and opposed to the p-type clad layer, both the one and the other end layers are barrier layers, and the other end layer 21n is thicker than the barrier layer of the one end layer.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: August 24, 2010
    Assignee: Showa Denko K.K.
    Inventors: Takaki Yasuda, Hideki Tomozawa
  • Publication number: 20090159902
    Abstract: A flip-chip type semiconductor light-emitting device having a positive electrode and a negative electrode similar in electrode area and capable of preventing the misalignment of the light-emitting device by utilizing the self alignment effect in manufacturing a light-emitting diode lamp and a printed circuit board for the flip-chip type semiconductor light-emitting device are provided. Furthermore, adopted are a flip-chip type semiconductor light-emitting device 1 which is provided with a negative electrode pad and a positive electrode pad formed on the side opposite the transparent substrate side of the semiconductor layer, wherein each of the electrode pads is formed in the same shape as each other and a printed circuit board for the light-emitting device has a pair of the electrode patterns which are formed in the same shape as each other. Still furthermore, a soldering film is included in each of the electrode pads.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 25, 2009
    Applicant: Showa Denko K.K.
    Inventors: Takaki Yasuda, Hideki Tomozawa
  • Patent number: 7488971
    Abstract: A nitride semiconductor product including an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer. Each barrier layer includes a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C. The barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: February 10, 2009
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Mineo Okuyama
  • Patent number: 7453091
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: November 18, 2008
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Patent number: 7436045
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: October 14, 2008
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20080230800
    Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.
    Type: Application
    Filed: April 27, 2005
    Publication date: September 25, 2008
    Inventors: Akira Bandoh, Hiromitsu Sakai, Masato Kobayakawa, Mineo Okuyama, Hideki Tomozawa, Hisayuki Miki, Joseph Gaze, Syunji Horikawa, Tetsuo Sakurai
  • Publication number: 20080230794
    Abstract: A pn junction type Group III nitride semiconductor light-emitting device 10 (11) of the present invention has a light-emitting layer 2 of multiple quantum well structure in which well layers 22 and barrier layers 21 including Group III nitride semiconductors are alternately stacked periodically between an n-type clad layer 105 and a p-type clad layer 107 which are formed on a crystal substrate and which include Group III nitride semiconductors, in which one end layer 21m of the light-emitting layer 2 is closest to and opposed to the n-type clad layer, and the other end layer 21n of the light-emitting layer 2 is closest to and opposed to the p-type clad layer, both the one and the other end layers are barrier layers, and the other end layer 21n is thicker than the barrier layer of the one end layer.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 25, 2008
    Inventors: Takaki Yasuda, Hideki Tomozawa
  • Patent number: 7402841
    Abstract: An object of the present invention is to provide a light-permeable electrode for use in a gallium nitride-based compound semiconductor light-emitting device, the electrode having improved light permeability and contact resistance. The inventive electrode comprises a light-permeable first layer which is in contact with a surface of a p-contact layer in a gallium nitride-based compound semiconductor light-emitting device and which is capable of providing ohmic contact, and a second layer which is in contact with a part of a surface of said p-contact layer, wherein the first layer comprises a metal, or an alloy of two or more metals, selected from a first group consisting of Au, Pt, Pd, Ni, Co, and Rh, and the second layer comprises an oxide of at least one metal selected from a second group consisting of Ni, Ti, Sn, Cr, Co, Zn, Cu, Mg, and In.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: July 22, 2008
    Assignee: Showa Denko K.K.
    Inventors: Hideki Tomozawa, Mineo Okuyama, Noritaka Muraki, Soichiro Masuyama
  • Publication number: 20070187693
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.
    Type: Application
    Filed: March 3, 2005
    Publication date: August 16, 2007
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20070152232
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.
    Type: Application
    Filed: March 3, 2005
    Publication date: July 5, 2007
    Applicant: SHOWA DENKO K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20070040183
    Abstract: An object of the present invention is to provide a light-permeable electrode for use in a gallium nitride-based compound semiconductor light-emitting device, the electrode having improved light permeability and contact resistance. The inventive electrode comprises a light-permeable first layer which is in contact with a surface of a p-contact layer in a gallium nitride-based compound semiconductor light-emitting device and which is capable of providing ohmic contact, and a second layer which is in contact with a part of a surface of said p-contact layer, wherein the first layer comprises a metal, or an alloy of two or more metals, selected from a first group consisting of Au, Pt, Pd, Ni, Co, and Rh, and the second layer comprises an oxide of at least one metal selected from a second group consisting of Ni, Ti, Sn, Cr, Co, Zn, Cu, Mg, and In.
    Type: Application
    Filed: September 21, 2004
    Publication date: February 22, 2007
    Inventors: Hideki Tomozawa, Mineo Okuyama, Noritaka Muraki, Soichiro Masuyama
  • Publication number: 20070012932
    Abstract: An object of the present invention is to provide a nitride semiconductor product which causes no time-dependent deterioration in reverse withstand voltage and maintains a satisfactory initial reverse withstand voltage. The inventive nitride semiconductor product comprises an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer, wherein each barrier layer comprises a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C, and the barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.
    Type: Application
    Filed: October 1, 2004
    Publication date: January 18, 2007
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Mineo Okuyama
  • Patent number: 5783251
    Abstract: An antistatic agent comprising a water-soluble electroconductive polymer comprising at least a repeating unit having a sulfo group-containing isothianaphthenylene structure; a method for suppressing electrification of an article during the production or use of the article by forming an electroconductive film comprising the water-soluble electroconductive polymer on the article; an article of which electrification is suppressed by having an electroconductive film comprising the water-soluble conductive polymer on the article; and a method for observing or inspecting an article with suppressing electrification thereof during irradiation with charged particle beams by forming an electroconductive film comprising the water-soluble electroconductive polymer on the article. The electroconductive film retains the electrification-suppressing effect and removability stably even when subjected to a heat treatment or left to stand for a long period of time.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: July 21, 1998
    Assignee: Showa Denko K.K.
    Inventors: Hideki Tomozawa, Yoshihiro Saida, Junya Kato, Yukie Akakabe, Yoshiaki Ikenoue, Reiko Ichikawa
  • Patent number: 5589270
    Abstract: Electrification is suppressed with a water-soluble electrification-suppressing film having an electron conductivity and comprising a polymer resin. A high electrification-suppressing effect which is also high in vacuum can be easily obtained by using the electrification-suppressing film with less contamination.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: December 31, 1996
    Assignees: Hitachi, Ltd., Showa Denko K.K.
    Inventors: Fumio Murai, Yasunori Suzuki, Hideki Tomozawa, Ryuma Takashi, Yoshihiro Saida, Yoshiaki Ikenoue
  • Patent number: 5437893
    Abstract: Electrification is suppressed with a water-soluble electrification-suppressing film having an electron conductivity and comprising a polymer resin. A high electrification-suppressing effect which is also high in vacuum can be easily obtained by using the electrification-suppressing film with less contamination.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: August 1, 1995
    Assignees: Hitachi, Ltd, Showa Denko K. K.
    Inventors: Fumio Murai, Yasunori Suzuki, Hideki Tomozawa, Ryuma Takashi, Yoshihiro Saida, Yoshiaki Ikenoue
  • Patent number: 5256454
    Abstract: Electrification is suppressed with a water-soluble electrification-suppressing film having an electron conductivity and comprising a polymer resin. A high electrification-suppressing effect which is also high in vacuum can be easily obtained by using the electrification-suppressing film with less contamination.
    Type: Grant
    Filed: May 30, 1991
    Date of Patent: October 26, 1993
    Assignees: Hitachi, Ltd., Showa Denko K.K. Corporations
    Inventors: Fumio Murai, Yasunori Suzuki, Hideki Tomozawa, Ryuma Takashi, Yoshihiro Saida, Yoshiaki Ikenoue