Patents by Inventor Hidekimi Fudo

Hidekimi Fudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8043772
    Abstract: In an exposure process forming a predetermined circuit pattern of a semiconductor device on a wafer, a resist dimension of the resist pattern formed on a wafer and a focus position in the exposure process at a past time are measured. A resist dimension and a focus position of a wafer to which the exposure process is secondly performed are estimated by using measurement results of the measured resist dimension and focus position, and a focus offset value is calculated by using estimated values of the estimated resist dimension and focus position. Then, an exposure dose is calculated with considering this focus offset value, and a resist pattern is formed on the wafer to which the exposure process is performed by using the calculated exposure dose and focus offset value.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 25, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Toshiharu Miwa, Junko Konishi, Toshihide Kawachi, Shigenori Yamashita, Takeshi Tashiro, Hidekimi Fudo
  • Patent number: 7879516
    Abstract: In the semiconductor integrated circuit device lithography process it is becoming more and more essential to control both exposure dose and focus value independently with a high accuracy. Using a wafer treated precedingly, a section profile of a photoresist is acquired by the technique of scatterometry, then both exposure dose and focus value are estimated independently with a high accuracy on the basis of the section profile thus acquired and using a conjectural expression obtained by the technique of multivariate analysis, and a focus setting in the exposure of a succeedingly treated wafer is corrected on the basis of the estimated exposure dose and focus value.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: February 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Toshihide Kawachi, Hidekimi Fudo
  • Publication number: 20090286174
    Abstract: In an exposure process forming a predetermined circuit pattern of a semiconductor device on a wafer, a resist dimension of the resist pattern formed on a wafer and a focus position in the exposure process at past time are measured, a resist dimension and a focus position of a wafer to which the exposure process is secondly performed are estimated by using measurement results of these measured resist dimension and focus position, and a focus offset value is calculated by using estimated values of these estimated resist dimension and focus position, and then, an exposure dose is calculated as considering this focus offset value, and a resist pattern is formed on the wafer to which the exposure process is performed by using these calculated exposure dose and focus offset value.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 19, 2009
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Toshiharu MIWA, Junko KONISHI, Toshihide KAWACHI, Shigenori YAMASHITA, Takeshi TASHIRO, Hidekimi FUDO
  • Publication number: 20080292977
    Abstract: In the semiconductor integrated circuit device lithography process it is becoming more and more essential to control both exposure dose and focus value independently with a high accuracy. Using a wafer treated precedingly, a section profile of a photoresist is acquired by the technique of scatterometry, then both exposure dose and focus value are estimated independently with a high accuracy on the basis of the section profile thus acquired and using a conjectural expression obtained by the technique of multivariate analysis, and a focus setting in the exposure of a succeedingly treated wafer is corrected on the basis of the estimated exposure dose and focus value.
    Type: Application
    Filed: April 11, 2008
    Publication date: November 27, 2008
    Inventors: Toshihide KAWACHI, Hidekimi Fudo