Patents by Inventor Hidemasa Oshige

Hidemasa Oshige has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200012020
    Abstract: An electronic viewfinder is provided. The electronic viewfinder includes a display device including a display portion and a peripheral portion positioned around the display portion, an eyepiece optical system facing the display device, and a light absorbing resin member facing a space between the display device and the eyepiece optical system. In a normal direction with respect to a first surface, of the display device, on a side of the eyepiece optical system, the light absorbing resin member includes an overlap portion that overlaps at least a part of the peripheral portion. A distance from a second surface, facing the eyepiece optical system, of the overlap portion to the first surface in the normal direction is not less than 1/11 of a focal length of the eyepiece optical system.
    Type: Application
    Filed: June 25, 2019
    Publication date: January 9, 2020
    Inventor: Hidemasa Oshige
  • Publication number: 20190312224
    Abstract: A display apparatus, comprising an element substrate including a display portion formed by arraying a plurality of organic light emitting elements on a base and a connecting portion provided on the base so as to be separated from the display portion, a driving substrate connected to the connecting portion so as to be configured to drive the display portion, and a heat-insulating portion provided between the display portion and the connecting portion in planar view in the base and configured to have lower heat conductivity than the base.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 10, 2019
    Inventor: Hidemasa Oshige
  • Patent number: 10424548
    Abstract: According to one aspect of the present invention, a method of manufacturing a semiconductor device is provided, which includes a bonding step bonding a semiconductor substrate having a semiconductor element disposed on a first surface, to a support substrate, at least through an adhesive layer between the semiconductor substrate and the support substrate, and a groove forming step forming a groove in a scribe area of the semiconductor substrate, from a side of a second surface of the semiconductor substrate, the second surface being opposite to the first surface, and in the groove forming step, a conductive layer between the semiconductor substrate and the support substrate is exposed at a bottom of the groove, without the adhesive layer being exposed in the groove.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: September 24, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yuichi Kazue, Takahiro Hachisu, Hidemasa Oshige
  • Patent number: 10388592
    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface, provided with a through hole which is surrounded by an inner side surface connecting the first surface to the second surface; a semiconductor element arranged on the first surface side; a wiring layer arranged on the first surface side; a through electrode arranged in the through hole, penetrating the semiconductor substrate, and connected to the wiring layer; and an insulating member arranged between the inner side surface and the through electrode, wherein the insulating member includes a first insulating film arranged between the inner side surface and the through electrode, and includes a second insulating film arranged between the first insulating film and the through electrode, and wherein a crack in the insulating member is in the first insulating film, and the crack is located between the second insulating film and the inner side surface.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: August 20, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hidemasa Oshige
  • Patent number: 10367102
    Abstract: An electronic component includes a support member in which a recess part having a bottom face and a side face is provided, and a device unit that includes a substrate and is fixed to the support member so that a primary face of the substrate faces the recess part. An opening width of the recess part is, on the side of the bottom of the recess part with respect to the primary face, narrower than the width of the device unit and, on the opposite side of the bottom of the recess part with respect to the primary face, wider than the width of the device unit. An end face of the substrate overlaps with the side face of the recess part in a direction perpendicular to the primary face of the substrate. A photoelectric conversion element is arranged on the primary face of the substrate.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: July 30, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hidemasa Oshige
  • Publication number: 20190057996
    Abstract: A semiconductor device disclosed includes a semiconductor substrate, an electrode layer arranged over the semiconductor substrate, and a conductive member provided in an opening and electrically connected to the electrode layer, and the opening penetrates the semiconductor substrate and reaches the electrode layer. The conductive member includes a metal portion and a barrier metal portion provided between a side surface of the opening and the metal portion, the barrier metal portion includes a first layer and a second layer provided between the first layer and the metal portion, and the second layer is denser than the first layer.
    Type: Application
    Filed: August 16, 2018
    Publication date: February 21, 2019
    Inventor: Hidemasa Oshige
  • Publication number: 20180261701
    Abstract: An electronic component includes a support member in which a recess part having a bottom face and a side face is provided, and a device unit that includes a substrate and is fixed to the support member so that a primary face of the substrate faces the recess part. An opening width of the recess part is, on the side of the bottom of the recess part with respect to the primary face, narrower than the width of the device unit and, on the opposite side of the bottom of the recess part with respect to the primary face, wider than the width of the device unit. An end face of the substrate overlaps with the side face of the recess part in a direction perpendicular to the primary face of the substrate. A photoelectric conversion element is arranged on the primary face of the substrate.
    Type: Application
    Filed: March 2, 2018
    Publication date: September 13, 2018
    Inventor: Hidemasa Oshige
  • Publication number: 20180151475
    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface, provided with a through hole which is surrounded by an inner side surface connecting the first surface to the second surface; a semiconductor element arranged on the first surface side; a wiring layer arranged on the first surface side; a through electrode arranged in the through hole, penetrating the semiconductor substrate, and connected to the wiring layer; and an insulating member arranged between the inner side surface and the through electrode, wherein the insulating member includes a first insulating film arranged between the inner side surface and the through electrode, and includes a second insulating film arranged between the first insulating film and the through electrode, and wherein a crack in the insulating member is in the first insulating film, and the crack is located between the second insulating film and the inner side surface.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 31, 2018
    Inventor: Hidemasa Oshige
  • Patent number: 9978804
    Abstract: A method of manufacturing an electronic device, comprising fixing a first wafer on a second wafer to form a space theirbetween, via a surrounding member configured to surround the space, forming an opening on a bottom side of the first wafer to expose a conductive member included in the first wafer, and then forming an electrode connected to the conductive member, wherein, in the fixing, the first wafer includes a trench intersecting the surrounding member, on an upper side of the first surface, and, in the forming, the electrode is formed under a condition that the space communicates with an external space via the trench.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: May 22, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hidemasa Oshige, Nobutaka Ukigaya
  • Publication number: 20180090453
    Abstract: According to one aspect of the present invention, a method of manufacturing a semiconductor device is provided, which includes a bonding step bonding a semiconductor substrate having a semiconductor element disposed on a first surface, to a support substrate, at least through an adhesive layer between the semiconductor substrate and the support substrate, and a groove forming step forming a groove in a scribe area of the semiconductor substrate, from a side of a second surface of the semiconductor substrate, the second surface being opposite to the first surface, and in the groove forming step, a conductive layer between the semiconductor substrate and the support substrate is exposed at a bottom of the groove, without the adhesive layer being exposed in the groove.
    Type: Application
    Filed: September 21, 2017
    Publication date: March 29, 2018
    Inventors: Yuichi Kazue, Takahiro Hachisu, Hidemasa Oshige
  • Publication number: 20180061710
    Abstract: A semiconductor device manufacturing method includes forming a first mask over a semiconductor substrate including a first and second surfaces and an electrode provided on the second surface side, forming a first opening having tapered shape by etching the semiconductor substrate with the first mask as a mask, forming a second mask covering a side surface of the first opening and exposing the bottom surface of the first opening, forming a second opening reaching the electrode by etching the semiconductor substrate with the second mask as a mask, forming an insulating film covering the side surfaces of the first and second openings, and forming a conductive member connected to the electrode in the first and second openings. A difference between a maximum width and a minimum width of the second opening is smaller than a difference between a maximum width and a minimum width of the first opening.
    Type: Application
    Filed: July 31, 2017
    Publication date: March 1, 2018
    Inventor: Hidemasa Oshige
  • Publication number: 20170287973
    Abstract: A method of manufacturing an electronic device, comprising fixing a first wafer on a second wafer to form a space theirbetween, via a surrounding member configured to surround the space, forming an opening on a bottom side of the first wafer to expose a conductive member included in the first wafer, and then forming an electrode connected to the conductive member, wherein, in the fixing, the first wafer includes a trench intersecting the surrounding member, on an upper side of the first surface, and, in the forming, the electrode is formed under a condition that the space communicates with an external space via the trench.
    Type: Application
    Filed: March 24, 2017
    Publication date: October 5, 2017
    Inventors: Hidemasa Oshige, Nobutaka Ukigaya
  • Publication number: 20130084666
    Abstract: Provided is a method for manufacturing a light emitting device that includes, on a substrate, a plurality of lower electrodes, a first, a second and a third organic layers each formed on one of the lower electrodes to emit light of a color different from each other, and a upper electrode opposite to the lower electrodes sandwiching the first, the second or the third organic layer. The method includes forming the first organic layer on the plurality of lower electrodes, removing the first organic layer on a certain lower electrode to expose the lower electrode, and then forming a new organic layer on the exposed lower electrode, and repeats this processing for the second and third organic layers.
    Type: Application
    Filed: September 14, 2012
    Publication date: April 4, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Hidemasa Oshige
  • Publication number: 20070003743
    Abstract: The main object of the present invention is to provide an inexpensive color filter substrate for an organic EL element and an organic EL display device which are capable of displaying good images having no defects such as dark spots. To attain the object, the invention provides a color filter substrate for an organic EL element having a substrate, a colored layer formed in a pattern form on/over the substrate, and a transparent electrode layer and a conductive layer laminated, in any order, on/over the colored layer, wherein the conductive layer is a coated film.
    Type: Application
    Filed: August 12, 2005
    Publication date: January 4, 2007
    Inventors: Masaaki Asano, Yasuko Baba, Hidemasa Oshige, Tatsuya Miyoshi