Patents by Inventor Hidemi Ozawa

Hidemi Ozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6838767
    Abstract: Provided is a technique which permits production of a semiconductor device having, integrated therein, a semiconductor chip smaller in external size than an ordinary semiconductor chip without lowering the production yield. The semiconductor device according to the present invention comprises a substrate having a square-shaped plane and having an interconnection formed on a first surface (chip mounting surface) of first and second opposite surfaces; a semiconductor chip which is mounted on the first surface of said substrate and has an electrode formed on a first surface (circuit forming surface) of first and second opposite surfaces of the semiconductor chip, and a conductive wire for electrically connecting the electrode of said semiconductor chip with the interconnection of said substrate, said interconnection having a plurality of connecting pads arranged from the peripheral side toward the inner side of said substrate.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: January 4, 2005
    Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Tsugihiko Hirano, Hidemi Ozawa
  • Patent number: 6472749
    Abstract: Provided is a technique which permits production of a semiconductor device having, integrated therein, a semiconductor chip smaller in external size than an ordinary semiconductor chip without lowering the production yield. The semiconductor device according to the present invention comprises a substrate having a square-shaped plane and having an interconnection formed on a first surface (chip mounting surface) of first and second opposite surfaces; a semiconductor chip which is mounted on the first surface of said substrate and has an electrode formed on a first surface (circuit forming surface) of first and second opposite surfaces of the semiconductor chip, and a conductive wire for electrically connecting the electrode of said semiconductor chip with the interconnection of said substrate, said interconnection having a plurality of connecting pads arranged from the peripheral side toward the inner side of said substrate.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: October 29, 2002
    Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Tsugihiko Hirano, Hidemi Ozawa
  • Publication number: 20020153618
    Abstract: Provided is a technique which permits production of a semiconductor device having, integrated therein, a semiconductor chip smaller in external size than an ordinary semiconductor chip without lowering the production yield. The semiconductor device according to the present invention comprises a substrate having a square-shaped plane and having an interconnection formed on a first surface (chip mounting surface) of first and second opposite surfaces; a semiconductor chip which is mounted on the first surface of said substrate and has an electrode formed on a first surface (circuit forming surface) of first and second opposite surfaces of the semiconductor chip, and a conductive wire for electrically connecting the electrode of said semiconductor chip with the interconnection of said substrate, said interconnection having a plurality of connecting pads arranged from the peripheral side toward the inner side of said substrate.
    Type: Application
    Filed: June 6, 2002
    Publication date: October 24, 2002
    Inventors: Tsugihiko Hirano, Hidemi Ozawa