Patents by Inventor Hidemi Yamamoto

Hidemi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240254687
    Abstract: Provided is artificial leather that combines good texture, high wear resistance, and a high-quality appearance without the addition of polyurethane resin. Artificial leather that includes at least a surface fiber layer constituting a first surface, the artificial leather being characterized by the following: the surface fiber layer includes main fibers and a thermoplastic resin; the main fibers have a fineness of 0.01 dtex to 0.
    Type: Application
    Filed: May 20, 2022
    Publication date: August 1, 2024
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventors: Hidehiro Yamaguchi, Mitsuaki Matsumoto, Masato Rikitake, Yusuke Watanabe, Daisuke Hironaka, Yoshiyuki Tadokoro, Aguru Yamamoto, Yoko Fujimoto, Hidemi Ito
  • Publication number: 20220184151
    Abstract: Described herein are methods and compositions for the use of treating and/or preventing vaginal bacterial infection and promoting healthy vaginal flora. Aspects of the invention relate to administering to a subject in need thereof a composition comprising a bacterial mixture of L. crispatus, L. gasseri, and L. jensenii.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 16, 2022
    Applicant: THE BRIGHAM AND WOMEN'S HOSPITAL, INC.
    Inventors: Raina FICHOROVA, Andrew ONDERDONK, Hidemi YAMAMOTO, Mary DELANEY, Andrea DUBOIS
  • Patent number: 11260086
    Abstract: Described herein are methods and compositions for the use of treating and/or preventing vaginal bacterial infection and promoting healthy vaginal flora. Aspects of the invention relate to administering to a subject in need thereof a composition comprising a bacterial mixture of L. crispatus, L. gasseri, and L. jensenii.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: March 1, 2022
    Assignee: THE BRIGHAM AND WOMEN'S HOSPITAL, INC.
    Inventors: Raina Fichorova, Andrew Onderdonk, Hidemi Yamamoto, Mary Delaney, Andrea Dubois
  • Publication number: 20190307817
    Abstract: Described herein are methods and compositions for the use of treating and/or preventing vaginal bacterial infection and promoting healthy vaginal flora. Aspects of the invention relate to administering to a subject in need thereof a composition comprising a bacterial mixture of L. crispatus, L. gasseri, and L. jensenii.
    Type: Application
    Filed: July 11, 2017
    Publication date: October 10, 2019
    Applicant: THE BRIGHAM AND WOMEN'S HOSPITAL, INC.
    Inventors: Raina FICHOROVA, Andrew ONDERDONK, Hidemi YAMAMOTO, Mary DELANEY, Andrea DUBOIS
  • Patent number: 7731484
    Abstract: The present invention has an object of controlling power consumption by a vacuum pump by varying the number of revolutions of the vacuum pump in accordance with the operating state of a vacuum device. The condition setting part 4 sets the relationship between the operating state of the vacuum device 10 and the rotational speed of the vacuum pump 2 that evacuates the vacuum device 10. This relationship is set to an appropriate value so as to prevent the rotational speed of the vacuum pump 2 from becoming a higher rotational speed than is required. The control part 6, to which external signals S1 through Sn corresponding to the operating state of the vacuum device 10 are input, reads out from the condition setting part 4 and outputs the rotational speed of the vacuum pump 2 corresponding to the external signals. The inverter 8 controls the rotational speed of the vacuum pump based on the output of the control part 6.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: June 8, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Hidemi Yamamoto, Kohji Tsuji
  • Publication number: 20050163622
    Abstract: The present invention has an object of controlling power consumption by a vacuum pump by varying the number of revolutions of the vacuum pump in accordance with the operating state of a vacuum device. The condition setting part 4 sets the relationship between the operating state of the vacuum device 10 and the rotational speed of the vacuum pump 2 that evacuates the vacuum device 10. This relationship is set to an appropriate value so as to prevent the rotational speed of the vacuum pump 2 from becoming a higher rotational speed than is required. The control part 6, to which external signals S1 through Sn corresponding to the operating state of the vacuum device 10 are input, reads out from the condition setting part 4 and outputs the rotational speed of the vacuum pump 2 corresponding to the external signals. The inverter 8 controls the rotational speed of the vacuum pump based on the output of the control part 6.
    Type: Application
    Filed: March 20, 2003
    Publication date: July 28, 2005
    Inventors: Hidemi Yamamoto, Kohji Tsuji
  • Patent number: 4268903
    Abstract: A data processor having a stack area with a desirable variable size formed on a desirable area of a main memory unit in accordance with a direction by a user program, is provided with a stack control register group for controlling the stack area. A stack upper address register in the stack control register group holds the upper address specified on the stack area. The stack lower address register holds the lower limit address specified. A control stack pointer register holds the start address of a control stack area formed on the stack area for storing the number of a register specified by a user program and the contents thereof. A data stack pointer register holds the start address of the data stack area which is formed on said stack area and used by the user program.
    Type: Grant
    Filed: November 27, 1978
    Date of Patent: May 19, 1981
    Assignee: Tokyo Shibaura Denki Kabusiki Kaisha
    Inventors: Yusaku Miki, Hidemi Yamamoto, Yuichi Kimihira, Akio Tanaka
  • Patent number: 4240139
    Abstract: A data processor includes a base register for a base address modification and a program counter for a relative address modification. An instruction executed in the data processor includes an operation code, a first operand, an address modification judgement bit, an index address modification field, a base address modification field and a displacement. When the instruction is fetched, it is arranged in an address modification and a base modification according to the address modification judgement bit. In the case of the relative address modification, the contents of the program counter is added to the contents of the displacement. In the case of the base address modification, the contents of the base register specified by the base address modification field is added to the contents of the displacement.
    Type: Grant
    Filed: September 14, 1978
    Date of Patent: December 16, 1980
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yasuo Fukuda, Michio Arai, Hidemi Yamamoto
  • Patent number: D578147
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: October 7, 2008
    Assignee: SMC Corporation
    Inventors: Yoshihiro Fukano, Ryuichi Masui, Masaru Saitoh, Hidemi Yamamoto, Hirofumi Watanabe