Patents by Inventor Hidemitsu Ogura

Hidemitsu Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5545906
    Abstract: A non-volatile semiconductor device comprises a memory cell having a P-type silicon substrate, an N-type diffusion region formed in the substrate and serving as a word line, N-type diffusion region one serving as a source and the other as a drain of the cell transistor, a floating gate extending from a region above the diffusion region over a region above between diffusion regions, and a bit line connected to the diffusion regions. Such a memory cell is characterized in that a passivation film is formed on an interlayer insulation film insulating the floating gate and the bit lines from each other, and that a contaminant shut-off layer is provided between the passivation film and the floating gate. With this structure, the route carrying contaminants into the cell can be shut off even during manufacture thereof, achieving a high reliability of the product.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: August 13, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidemitsu Ogura, Koichi Kanzaki
  • Patent number: 5532181
    Abstract: According to this invention, a semiconductor non-volatile memory device includes a semiconductor substrate, insulating films formed on the semiconductor substrate and having at least two types of gate insulating films having different thicknesses and a first conductive film formed on the insulating films and electrically floating from the semiconductor substrate through the insulating films. These at least two types of gate insulating films include a first insulating film formed on said semiconductor substrate and a first diffusion layer of a conductivity type and a second insulating film formed on said semiconductor substrate and a second diffusion layer, of the opposite conductivity type, which is isolated from the first diffusion layer. The first conductive film is formed on the first and second insulating films.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: July 2, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masataka Takebuchi, Daisuke Tohyama, Hidemitsu Ogura
  • Patent number: 5324972
    Abstract: According to this invention, a semiconductor non-volatile memory device includes a semiconductor substrate, insulating films formed on the semiconductor substrate and having at least two types of gate insulating films having different thicknesses and a first conductive film formed on the insulating films and electrically floating from the semiconductor substrate through the insulating films. These at least two types of gate insulating films include a first insulating film formed on said semiconductor substrate and a first diffusion layer of a conductivity type and a second insulating film formed on said semiconductor substrate and a second diffusion layer, of the opposite conductivity type, which is isolated from the first diffusion layer. The first conductive film is formed on the first and second insulating films.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: June 28, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masataka Takebuchi, Daisuke Tohyama, Hidemitsu Ogura