Abstract: An imaging device includes a photoelectric conversion layer that includes a first surface and a second surface opposite the first surface and that generates signal charge, at least one pixel electrode located on the first surface of the photoelectric conversion layer, a control electrode located on the first surface of the photoelectric conversion layer, a counter electrode located on the second surface of the photoelectric conversion layer and opposite the at least one pixel electrode and the control electrode, and a charge accumulator that is connected to the at least one pixel electrode and that accumulates the signal charge. There is a line segment connecting two points on the at least one pixel electrode to each other and overlapping the control electrode in plan view.

Abstract: An imaging device includes a counter electrode, a photoelectric conversion layer that converts light into a signal charge, a plurality of sets of electrodes each of which collects the signal charge, each of the plurality of sets including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel, and an auxiliary electrode which is located, as seen in plan view, between the first electrode and the second electrode in each of the plurality of sets and which is commonly included in the high-sensitivity pixel and the low-sensitivity pixel. The distance between the first electrode and the auxiliary electrode is different from the distance between the second electrode and the auxiliary electrode.

Abstract: An imaging device including: a first pixel and a second pixel that are arranged along a first direction, the first pixel and the second pixel each including a photoelectric converter that converts light into a charge, a charge accumulator that accumulates the charge, and a first transistor one of a source and a drain of which is connected to the charge accumulator; a first line and a second line that each extend along the first direction; first voltage supply circuitry that is connected to the first transistor of the first pixel through the first line; and second voltage supply circuitry that is connected to the first transistor of the second pixel through the second line.

Abstract: An imaging device including: a semiconductor substrate including a pixel region and a peripheral region; an insulating layer that covers the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry configured to be electrically connected to the first electrodes; peripheral circuitry configured to be electrically connected to the detection circuitry, and including analog circuitry; and a third electrode electrically connected to the second electrode.

Abstract: An imaging device including: a semiconductor substrate including a pixel region and a peripheral region; an insulating layer that covers the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry configured to be electrically connected to the first electrodes; peripheral circuitry configured to be electrically connected to the detection circuitry, and including analog circuitry; and a third electrode electrically connected to the second electrode.

Abstract: An imaging device including a semiconductor substrate including a pixel region and a peripheral region; an insulating layer covering the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer covering the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry electrically connected to the first electrodes; peripheral circuitry electrically connected to the detection circuitry, and; and a third electrode located on the insulating layer.

Abstract: An imaging device including: a first pixel and a second pixel that are arranged along a first direction, the first pixel and the second pixel each including a photoelectric converter that converts light into a charge, a charge accumulator that accumulates the charge, and a first transistor one of a source and a drain of which is connected to the charge accumulator; a first line and a second line that each extend along the first direction; first voltage supply circuitry that is connected to the first transistor of the first pixel through the first line; and second voltage supply circuitry that is connected to the first transistor of the second pixel through the second line.

Abstract: An imaging device includes: a first imaging cell including a first photoelectric converter that generates a first signal by photoelectric conversion, and a first signal processing circuit that is electrically connected to the first photoelectric converter and detects the first signal; and a second imaging cell including a second photoelectric converter that generates a second signal by photoelectric conversion, and a second signal processing circuit that is electrically connected to the second photoelectric converter and detects the second signal. Sensitivity of the first imaging cell is higher than sensitivity of the second imaging cell. The first signal processing circuit has a circuit configuration different from the second signal processing circuit. An operation frequency of the first signal processing circuit is different from an operation frequency of the second signal processing circuit.

Abstract: An imaging device includes: a first pixel and a second pixel that are arranged along a first direction and each include a photoelectric converter, a charge accumulator, a first transistor one of a source and a drain of which is connected to the charge accumulator, and a second transistor a gate of which is connected to the charge accumulator; a first line and a second line that each extend along the first direction; a first voltage supply circuit configured to generate a voltage between a first voltage turning on the first transistor of the first pixel and a second voltage turning off the first transistor of the first pixel; and a second voltage supply circuit configured to generate a voltage between a fourth voltage turning on the first transistor of the second pixel and a fifth voltage turning off the first transistor of the second pixel.

Abstract: An imaging device including a semiconductor substrate including a pixel region and a peripheral region; an insulating layer covering the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer covering the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry electrically connected to the first electrodes; peripheral circuitry electrically connected to the detection circuitry, and; and a third electrode located on the insulating layer.

Abstract: An imaging device includes: a first chip that includes pixels arranged in a row, the pixels including: a first pixel including a first photoelectric converter and a first transistor, having a first control terminal, coupled to the first photoelectric converter; and a second pixel including a second photoelectric converter and a second transistor, having a second control terminal, coupled to the second photoelectric converter; and a second chip including: a signal line extending along the row; a first buffer circuit having a first input terminal and a first output terminal, the first input terminal being coupled to the signal line, the first output terminal being coupled to the first control terminal; and a second buffer circuit having a second input terminal and a second output terminal, the second input terminal being coupled to the signal line, the second output terminal being coupled to the second control terminal.

Abstract: An imaging device includes: a semiconductor substrate including a pixel region in which pixels are arranged and a peripheral region adjacent to the pixel region; an insulating layer that covers the pixel region and the peripheral region; a first electrode located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrode; a second electrode that covers the photoelectric conversion layer; detection circuitry located in the pixel region and connected to the first electrode; peripheral circuitry located in the peripheral region and connected to the detection circuitry; and a third electrode located on the insulating layer above the peripheral region. The second electrode extends above the peripheral region, and the second electrode includes a connection region in which the second electrode is connected to the third electrode, the connection region overlapping the peripheral circuitry in plan view.

Abstract: An imaging device includes: a pixel that outputs a pixel signal corresponding to incident light; a comparator that compares the pixel signal with a reference signal and generates an output signal that indicates a comparison result; a counter that generates a digital signal corresponding to the pixel signal by counting the number of periods until the output signal is inverted, the counter including first to fourth counter parts, each of which corresponds to one of bits included in the digital signal; a memory that stores the digital signal, the memory including first to fourth memory parts corresponding to the first to fourth counter parts; and first and second lines. The first and third counter parts are respectively connected to the first and third memory parts through the first line. The second and fourth counter parts are respectively connected to the second and fourth memory parts through the second line.

Abstract: An imaging device includes: a first chip that includes pixels arranged in a row, the pixels including: a first pixel including a first photoelectric converter and a first transistor, having a first control terminal, coupled to the first photoelectric converter; and a second pixel including a second photoelectric converter and a second transistor, having a second control terminal, coupled to the second photoelectric converter; and a second chip including: a signal line extending along the row; a first buffer circuit having a first input terminal and a first output terminal, the first input terminal being coupled to the signal line, the first output terminal being coupled to the first control terminal; and a second buffer circuit having a second input terminal and a second output terminal, the second input terminal being coupled to the signal line, the second output terminal being coupled to the second control terminal.

Abstract: An imaging device having pixels in a row which include: first pixel including a first photoelectric converter and a first transistor having a first control terminal; second pixel including a second photoelectric converter and a second transistor having a second control terminal; third pixel including a third photoelectric converter and a third transistor having a third control terminal; and fourth pixel including a fourth photoelectric converter and a fourth transistor having a fourth control terminal. The device further including input signal line, a signal for controlling the first to fourth transistors input to the signal line; first buffer circuit having a first input terminal coupled to the signal line, and a first output terminal coupled to the first and second control terminals; and second buffer circuit having a second input terminal coupled to the signal line and a second output terminal coupled to the second and third control terminals.

Abstract: An imaging device includes: a first pixel and a second pixel that are arranged along a first direction and each include a photoelectric converter, a charge accumulator, a first transistor one of a source and a drain of which is connected to the charge accumulator, and a second transistor a gate of which is connected to the charge accumulator; a first line and a second line that each extend along the first direction; a first voltage supply circuit configured to generate a voltage between a first voltage turning on the first transistor of the first pixel and a second voltage turning off the first transistor of the first pixel; and a second voltage supply circuit configured to generate a voltage between a fourth voltage turning on the first transistor of the second pixel and a fifth voltage turning off the first transistor of the second pixel.

Abstract: An imaging device includes: a semiconductor substrate including a pixel region in which pixels are arranged and a peripheral region adjacent to the pixel region; an insulating layer that covers the pixel region and the peripheral region; a first electrode located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrode; a second electrode that covers the photoelectric conversion layer; detection circuitry located in the pixel region and connected to the first electrode; peripheral circuitry located in the peripheral region and connected to the detection circuitry; and a third electrode located on the insulating layer above the peripheral region. The second electrode extends above the peripheral region, and the second electrode includes a connection region in which the second electrode is connected to the third electrode, the connection region overlapping the peripheral circuitry in plan view.

Abstract: An imaging device having pixels in a row which include: first pixel including a first photoelectric converter and a first transistor having a first control terminal; second pixel including a second photoelectric converter and a second transistor having a second control terminal; third pixel including a third photoelectric converter and a third transistor having a third control terminal; and fourth pixel including a fourth photoelectric converter and a fourth transistor having a fourth control terminal. The device further including input signal line, a signal for controlling the first to fourth transistors input to the signal line; first buffer circuit having a first input terminal coupled to the signal line, and a first output terminal coupled to the first and second control terminals; and second buffer circuit having a second input terminal coupled to the signal line and a second output terminal coupled to the second and third control terminals.

Abstract: An imaging device includes: first and second pixel cells each including a photoelectric converter and a transistor electrically connected to the photoelectric converter, the transistor having a control terminal; a first buffer circuit having a first input terminal and a first output terminal, the first buffer circuit receiving a signal for controlling the transistor of the first pixel cell; a second buffer circuit having a second input terminal and a second output terminal, the second buffer circuit receiving a signal for controlling the transistor of the second pixel cell; a first control signal line connecting the first output terminal to the control terminal of the first pixel cell; and a second control signal line connecting the second output terminal to the control terminal of the second pixel cell. The first control signal line and the second control signal line are connected to each other.

Abstract: An imaging device includes: a pixel that outputs a pixel signal corresponding to incident light; a comparator that compares the pixel signal with a reference signal and generates an output signal that indicates a comparison result; a counter that generates a digital signal corresponding to the pixel signal by counting the number of periods until the output signal is inverted, the counter including first to fourth counter parts, each of which corresponds to one of bits included in the digital signal; a memory that stores the digital signal, the memory including first to fourth memory parts corresponding to the first to fourth counter parts; and first and second lines. The first and third counter parts are respectively connected to the first and third memory parts through the first line. The second and fourth counter parts are respectively connected to the second and fourth memory parts through the second line.