Patents by Inventor Hidenobu Matsumura
Hidenobu Matsumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11635374Abstract: An optical testing device for use in testing an optical measuring instrument provides incident light from a light source to an incident object and receives reflected light due to reflection of the incident light at the incident object. The optical testing device includes an incident light receiving section that receives incident light, and a light signal providing section. The light signal providing section provides a light signal to the incident object after a predetermined delay time since the incident light receiving section has received the incident light. A reflected light signal due to reflection of the light signal at the incident object is provided to the optical measuring instrument. The delay time is approximately equal to the time between emission of the incident light from the light source and reception of the reflected light by the optical measuring instrument in the case of actually using the optical measuring instrument.Type: GrantFiled: April 1, 2020Date of Patent: April 25, 2023Assignee: ADVANTEST CORPORATIONInventors: Toshihiro Sugawara, Shin Masuda, Takao Sakurai, Hidenobu Matsumura, Takao Seki
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Publication number: 20200355608Abstract: An optical testing device for use in testing an optical measuring instrument provides incident light from a light source to an incident object and receives reflected light due to reflection of the incident light at the incident object. The optical testing device includes an incident light receiving section that receives incident light, and a light signal providing section. The light signal providing section provides a light signal to the incident object after a predetermined delay time since the incident light receiving section has received the incident light. A reflected light signal due to reflection of the light signal at the incident object is provided to the optical measuring instrument. The delay time is approximately equal to the time between emission of the incident light from the light source and reception of the reflected light by the optical measuring instrument in the case of actually using the optical measuring instrument.Type: ApplicationFiled: April 1, 2020Publication date: November 12, 2020Applicant: ADVANTEST CORPORATIONInventors: Toshihiro SUGAWARA, Shin MASUDA, Takao SAKURAI, Hidenobu MATSUMURA, Takao SEKI
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Patent number: 9817024Abstract: A test carrier includes a base member on which a first electronic device under test is able to be temporarily mounted, and a second electronic device which is configured to be used to test the first electronic device. The second electronic device is mounted on the base member, and the second electronic device is able to be electrically connected to the first electronic device.Type: GrantFiled: June 11, 2015Date of Patent: November 14, 2017Assignee: ADVANTEST CORPORATIONInventors: Hidenobu Matsumura, Noriyuki Masuda
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Publication number: 20160003869Abstract: A test carrier includes a base member on which a first electronic device under test is able to be temporarily mounted, and a second electronic device which is configured to be used to test the first electronic device. The second electronic device is mounted on the base member, and the second electronic device is able to be electrically connected to the first electronic device.Type: ApplicationFiled: June 11, 2015Publication date: January 7, 2016Applicant: ADVANTEST CORPORATIONInventors: Hidenobu MATSUMURA, Noriyuki MASUDA
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Patent number: 8604773Abstract: Provided is a receiving method and a receiving apparatus comprising a multi-strobe generating section that generates a multi-strobe including a plurality of strobes having different phases with respect to a reception signal; an acquiring section that acquires the reception signal using each of the strobes; a detecting section that detects a change position at which a value of the reception signal changes, based on the acquisition result of the acquiring section; and a selecting section that selects, as a reception data value, the value of the reception signal acquired using a strobe at a position shifted by a predetermined phase from the change position. The receiving apparatus may further comprise a reference clock generating section that generates a reference clock having a preset period, and the multi-strobe generating section generates the multi-strobe for each pulse of the reference clock.Type: GrantFiled: November 4, 2010Date of Patent: December 10, 2013Assignee: Advantest CorporationInventors: Shusuke Kantake, Hidenobu Matsumura
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Publication number: 20110115468Abstract: Provided is a receiving method and a receiving apparatus comprising a multi-strobe generating section that generates a multi-strobe including a plurality of strobes having different phases with respect to a reception signal; an acquiring section that acquires the reception signal using each of the strobes; a detecting section that detects a change position at which a value of the reception signal changes, based on the acquisition result of the acquiring section; and a selecting section that selects, as a reception data value, the value of the reception signal acquired using a strobe at a position shifted by a predetermined phase from the change position. The receiving apparatus may further comprise a reference clock generating section that generates a reference clock having a preset period, and the multi-strobe generating section generates the multi-strobe for each pulse of the reference clock.Type: ApplicationFiled: November 4, 2010Publication date: May 19, 2011Applicant: ADVANTEST CORPORATIONInventors: Shusuke KANTAKE, Hidenobu MATSUMURA
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Publication number: 20060150019Abstract: A semiconductor device for measuring delay time of a wiring under test provided therein is provided, wherein the semiconductor device includes: a loop path on which the wiring under test is provided; a delay element for delaying an input signal by a predetermined time; a delay selecting unit for determining whether or not the delay element is connected on the loop path; a loop delay measuring unit for measuring delay time of the loop path; a first gate delay estimating unit for estimating delay time of the delay element by subtracting delay time of the loop path in case the delay element is not connected on the loop path from delay time of the loop path in case the delay element is connected on the loop path; a second gate delay estimating unit for estimating delay time of a logic circuit connected on the loop path on the basis of the delay time of the delay element; and a wiring delay estimating unit for estimating delay time of the wiring under test.Type: ApplicationFiled: April 11, 2005Publication date: July 6, 2006Applicant: Advantest CorporationInventors: Makoto Yamazaki, Hidenobu Matsumura, Yasuo Furukawa
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Patent number: 6370675Abstract: A semiconductor integrated circuit design and evaluation system for designing an LSI device under an electric design automation (EDA) environment and for evaluating a test pattern produced based on the CAD data derived in the design stage of the LSI device.Type: GrantFiled: August 18, 1998Date of Patent: April 9, 2002Assignee: Advantest Corp.Inventors: Hidenobu Matsumura, Hiroaki Yamoto, Koji Takahashi
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Patent number: 6249891Abstract: A high speed evaluation apparatus for evaluating a test pattern produced for a semiconductor test system or performing a diagnostic test on a design of the semiconductor device, based on logic simulation data produced in a design stage of the semiconductor device through a CAD (computer aided design) process, without using an actual semiconductor test system or a semiconductor device.Type: GrantFiled: July 2, 1998Date of Patent: June 19, 2001Assignee: Advantest Corp.Inventors: Hidenobu Matsumura, Hiroaki Yamoto, Koji Takahashi
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Patent number: 6061283Abstract: A semiconductor integrated circuit evaluation system for evaluating, at high speed, functions of a device under test and a test pattern for testing the device under test without using an actual tester or designed device.Type: GrantFiled: October 23, 1998Date of Patent: May 9, 2000Assignee: Advantest Corp.Inventors: Koji Takahashi, Hiroaki Yamoto, Hidenobu Matsumura