Patents by Inventor Hidenobu Miyoshi
Hidenobu Miyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10958905Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.Type: GrantFiled: January 29, 2020Date of Patent: March 23, 2021Assignee: FUJITSU LIMITEDInventors: Xuying Lei, Hidenobu Miyoshi, Shunsuke Kobayashi, Kazuhiro Yamashita
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Patent number: 10897623Abstract: A video coding device includes a memory and a processor coupled to the memory. The processor is configured to sequentially receive a plurality of pictures and detect a scene change based on the plurality of pictures. When a scene change is detected, the processor determines whether a given condition is satisfied by a position of a first picture where the scene change is detected. When the given condition is satisfied by the position of the first picture, the processor redisplays, instead of the first picture, a forward second picture among a plurality of pictures referenced by the first picture.Type: GrantFiled: August 20, 2019Date of Patent: January 19, 2021Assignee: FUJITSU LIMITEDInventors: Xuying Lei, Hidenobu Miyoshi
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Patent number: 10827199Abstract: An apparatus includes: a processor configured to: execute temporal-scalable coding on input-video-image data at a first frame rate; convert the input-video-image data to video-image data of a second frame rate lower than the first frame rate; execute temporal-scalable coding on the video-image data of the second frame-rate and output a second encoding-complexity measure of a picture subjected to the temporal-scalable coding at the second frame-rate; correct, when the temporal-scalable coding is executed on the input-video-image data at the first frame-rate, a first encoding-complexity measure, estimated based on the second encoding-complexity of the picture and to be referenced for a picture to be encoded, of the picture to be encoded, based on a distance between the picture to be encoded and the picture to be referenced in a time direction; and execute the temporal-scalable coding on the input-video-image data at the first frame-rate based on the corrected first encoding-complexity measure.Type: GrantFiled: April 10, 2019Date of Patent: November 3, 2020Assignee: FUJITSU LIMITEDInventors: Xuying Lei, Hidenobu Miyoshi, Kimihiko Kazui
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Patent number: 10827172Abstract: An apparatus includes a memory and one or more processors. The processors code each block in a frame of moving images with use of a reference image. The processors generate a decoded image by decoding a coded block and calculate evaluation values for selection of each type of offset filtering. The processors also determine whether the block to be coded is a static region and make an adjustment in the evaluation value on the first offset filtering, based on a layer position of the reference image in a time direction upon a determination that the block to be coded is the static region. The processors also select the type of offset filtering based on the evaluation value on first offset filtering having undergone the adjustment and the evaluation values on second offset filtering and third offset filtering and carry out the selected offset filtering for the decoded image.Type: GrantFiled: September 6, 2018Date of Patent: November 3, 2020Assignee: FUJITSU LIMITEDInventor: Hidenobu Miyoshi
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Publication number: 20200252607Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.Type: ApplicationFiled: January 29, 2020Publication date: August 6, 2020Applicant: FUJITSU LIMITEDInventors: XUYING LEI, Hidenobu MIYOSHI, Shunsuke Kobayashi, KAZUHIRO YAMASHITA
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Patent number: 10652549Abstract: A region determination circuit determines, for a first block encoded by referring to a first prediction block generated by applying a bidirectional prediction mode for a first component of a pixel value from among blocks in a coding-target picture included in video data, a partial region to which a unidirectional prediction mode is to be applied for a second component on the basis of a difference value for the first component between corresponding pixels belonging to the first prediction block and the first block. A prediction circuit generates a second prediction block for the second component by applying a unidirectional prediction mode to the partial region and a bidirectional prediction mode to a region that is not the partial region. An encoder calculates a prediction error for the second component between corresponding pixels belonging to the first block and the second prediction block and encodes the prediction error.Type: GrantFiled: July 11, 2018Date of Patent: May 12, 2020Assignee: FUJITSU LIMITEDInventor: Hidenobu Miyoshi
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Patent number: 10638155Abstract: An apparatus for a video encoding process executes a difference process for calculating a difference value between corresponding pixels of a first reference block on a first encoded reference picture in a first direction and a second reference block on a second encoded reference picture in a second direction; executes a predictive process for generating a predictive block by calculating a pixel value of the predictive block in accordance with the bi-predictive mode for each pixel in which an absolute value of the difference value is less than a threshold value, and by calculating the pixel value of the predictive block based on a value of the corresponding pixel of one of the first reference block and the second reference block for each pixel in which the absolute value of the difference value is the threshold value or more.Type: GrantFiled: December 11, 2017Date of Patent: April 28, 2020Assignee: FUJITSU LIMITEDInventors: Kenshiro Takeuchi, Kimihiko Kazui, Satoshi Shimada, Hidenobu Miyoshi, Guillaume Denis Christian Barroux
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Publication number: 20200077103Abstract: A video coding device includes a memory and a processor coupled to the memory. The processor is configured to sequentially receive a plurality of pictures and detect a scene change based on the plurality of pictures. When a scene change is detected, the processor determines whether a given condition is satisfied by a position of a first picture where the scene change is detected. When the given condition is satisfied by the position of the first picture, the processor redisplays, instead of the first picture, a forward second picture among a plurality of pictures referenced by the first picture.Type: ApplicationFiled: August 20, 2019Publication date: March 5, 2020Applicant: FUJITSU LIMITEDInventors: XUYING LEI, Hidenobu MIYOSHI
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Publication number: 20200053357Abstract: An encoder includes: a plurality of first processors; and a second processor configured to: generate reduced image information by reducing image information; determine that a first block is a preferential object block when it is determined, based on a direction of a motion vector of the first block, that the first block is a block to be encoded with reference to a block included in a second reduced slice adjacent to a first reduced slice among reduced slices obtained by dividing the reduced image information, the first block being included in the first reduced slice; and perform, when the first block is a preferential object block, a control to reduce a first quantization parameter used by one of the plurality of first processors to encode a block corresponding to the first block among a plurality of blocks included in a first slice corresponding to the first reduced slice.Type: ApplicationFiled: July 19, 2019Publication date: February 13, 2020Applicant: FUJITSU LIMITEDInventors: XUYING LEI, Hidenobu MIYOSHI
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Publication number: 20190356912Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and the processor configured to by using image data of an image to be subjected to temporal scalable coding, obtain a motion vector for the image, based on the motion vector, determine whether an image group to be encoded is a still scene, when the image group is determined to be the still scene, add an offset value to an intra-prediction encoding cost of the image included in the image group, based on an intra-prediction encoding cost to which the offset value is added, select an inter-prediction mode in which a predictive image of the image included in the image group is generated by inter-prediction, and by utilizing image data of the predictive image, perform an encoding process on the image data of the image included in the image group.Type: ApplicationFiled: March 28, 2019Publication date: November 21, 2019Applicant: FUJITSU LIMITEDInventor: Hidenobu MIYOSHI
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Publication number: 20190335204Abstract: An apparatus includes: a processor configured to: execute temporal-scalable coding on input-video-image data at a first frame rate; convert the input-video-image data to video-image data of a second frame rate lower than the first frame rate; execute temporal-scalable coding on the video-image data of the second frame-rate and output a second encoding-complexity measure of a picture subjected to the temporal-scalable coding at the second frame-rate; correct, when the temporal-scalable coding is executed on the input-video-image data at the first frame-rate, a first encoding-complexity measure, estimated based on the second encoding-complexity of the picture and to be referenced for a picture to be encoded, of the picture to be encoded, based on a distance between the picture to be encoded and the picture to be referenced in a time direction; and execute the temporal-scalable coding on the input-video-image data at the first frame-rate based on the corrected first encoding-complexity measure.Type: ApplicationFiled: April 10, 2019Publication date: October 31, 2019Applicant: FUJITSU LIMITEDInventors: XUYING LEI, Hidenobu MIYOSHI, Kimihiko KAZUI
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Publication number: 20190089954Abstract: An apparatus includes a memory and one or more processors. The processors code each block in a frame of moving images with use of a reference image. The processors generate a decoded image by decoding a coded block and calculate evaluation values for selection of each type of offset filtering. The processors also determine whether the block to be coded is a static region and make an adjustment in the evaluation value on the first offset filtering, based on a layer position of the reference image in a time direction upon a determination that the block to be coded is the static region. The processors also select the type of offset filtering based on the evaluation value on first offset filtering having undergone the adjustment and the evaluation values on second offset filtering and third offset filtering and carry out the selected offset filtering for the decoded image.Type: ApplicationFiled: September 6, 2018Publication date: March 21, 2019Applicant: FUJITSU LIMITEDInventor: Hidenobu MIYOSHI
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Publication number: 20190028711Abstract: A region determination circuit determines, for a first block encoded by referring to a first prediction block generated by applying a bidirectional prediction mode for a first component of a pixel value from among blocks in a coding-target picture included in video data, a partial region to which a unidirectional prediction mode is to be applied for a second component on the basis of a difference value for the first component between corresponding pixels belonging to the first prediction block and the first block. A prediction circuit generates a second prediction block for the second component by applying a unidirectional prediction mode to the partial region and a bidirectional prediction mode to a region that is not the partial region. An encoder calculates a prediction error for the second component between corresponding pixels belonging to the first block and the second prediction block and encodes the prediction error.Type: ApplicationFiled: July 11, 2018Publication date: January 24, 2019Applicant: FUJITSU LIMITEDInventor: Hidenobu MIYOSHI
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Patent number: 10097827Abstract: An image encoding apparatus includes a mode determining unit and an encoding unit. The mode determining unit determines a first operating mode and a second operating mode of an adaptive filter which is applied to a block in an input image in decoding. In this regard, the mode determining unit determines the first operating mode based on a first signal of the input image, and determines the second operating mode based on a second signal of the input image. The encoding unit encodes the second operating mode by assigning a code with a lower bit number to the second operating mode when the second operating mode has higher similarities to the first operating mode.Type: GrantFiled: March 17, 2017Date of Patent: October 9, 2018Assignee: FUJITSU LIMITEDInventor: Hidenobu Miyoshi
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Publication number: 20180184116Abstract: An apparatus for a video encoding process executes a difference process for calculating a difference value between corresponding pixels of a first reference block on a first encoded reference picture in a first direction and a second reference block on a second encoded reference picture in a second direction; executes a predictive process for generating a predictive block by calculating a pixel value of the predictive block in accordance with the bi-predictive mode for each pixel in which an absolute value of the difference value is less than a threshold value, and by calculating the pixel value of the predictive block based on a value of the corresponding pixel of one of the first reference block and the second reference block for each pixel in which the absolute value of the difference value is the threshold value or more.Type: ApplicationFiled: December 11, 2017Publication date: June 28, 2018Applicant: FUJITSU LIMITEDInventors: Kenshiro Takeuchi, Kimihiko KAZUI, Satoshi SHIMADA, Hidenobu MIYOSHI, Guillaume Denis Christian Barroux
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Patent number: 9854238Abstract: In a video encoding apparatus, an encoder for encoding a first region of a picture includes: an inhibited block identifying unit which identifies a first inhibit target sub-block that is contained within the first region and that may select a motion vector of a referenced block contained in a second region of an already encoded picture, the second region being a region encoded by another encoder, as a prediction vector for the motion vector of the first sub-block when an inter-predictive coding mode is applied; and a predictive encoding unit which uses a motion vector other than the motion vector of the referenced block as the prediction vector when encoding a second inhibit target sub-block by using the inter-predictive coding mode, wherein the second inhibit target sub-block is a sub-block that contains the first inhibit target sub-block and at which the inter-predictive coding mode is applied.Type: GrantFiled: March 11, 2015Date of Patent: December 26, 2017Assignee: FUJITSU LIMITEDInventor: Hidenobu Miyoshi
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Patent number: 9813716Abstract: A video encoder includes: a restriction block identification unit that determines a valid prediction mode with a reference range not overlapping an unrefreshed region, for each size of a first sub-block, which is a unit for generating a prediction block, when a coding-target block in a refreshed region is to be encoded by intra prediction coding; and a coding mode determination unit that identifies a combination of the size of the first sub-block, the size of a second sub-block, which is a unit for application of a prediction mode, and a valid prediction mode with the smallest estimation value of the amount of code for encoding a third block, which is a unit for application of an intra prediction coding mode, as a combination to be used for intra prediction coding of the third sub-block.Type: GrantFiled: October 31, 2014Date of Patent: November 7, 2017Assignee: FUJITSU LIMITEDInventor: Hidenobu Miyoshi
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Publication number: 20170289541Abstract: An image encoding apparatus includes a mode determining unit and an encoding unit. The mode determining unit determines a first operating mode and a second operating mode of an adaptive filter which is applied to a block in an input image in decoding. In this regard, the mode determining unit determines the first operating mode based on a first signal of the input image, and determines the second operating mode based on a second signal of the input image. The encoding unit encodes the second operating mode by assigning a code with a lower bit number to the second operating mode when the second operating mode has higher similarities to the first operating mode.Type: ApplicationFiled: March 17, 2017Publication date: October 5, 2017Applicant: FUJITSU LIMITEDInventor: Hidenobu MIYOSHI
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Patent number: 9654760Abstract: An encoding device includes a determination unit configured to determine, when performing detection of a motion vector using the decoded image of a frame image encoded in increments of blocks prior to the frame image to be encoded regarding an encoded block to be encoded of a plurality of blocks included in this frame image to be encoded at the time of encoding a frame image included in a moving image where a first image and a second image are arrayed using inter-image prediction encoding processing, correlation height as to the image of the encoded block regarding each of the image of a first area corresponding to the first image and the image of a second area corresponding to the second image included in a boundary block straddling a boundary between the first image and the second image of a block included in the decoded image.Type: GrantFiled: November 7, 2012Date of Patent: May 16, 2017Assignee: FUJITSU LIMITEDInventors: Junpei Koyama, Kimihiko Kazui, Hidenobu Miyoshi, Satoshi Shimada
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Patent number: 9621886Abstract: A motion video encoding apparatus includes: a group determining unit which determines to which of a plurality of groups each block belongs; a group decode time information computing unit which computes a decode time for each of the groups; a group information appending unit which appends group information identifying the group to which each block belongs to data to be output; a code amount control unit which controls an amount of code for each block contained in the group so that data needed for decoding all the blocks contained in the group will arrive at a stream receive buffer provided in a motion video decoding apparatus by the decode time of the group when the data is transmitted to the motion video decoding apparatus at a prescribed transmission rate; and an encode processing unit which encodes each block, based on control information concerning the amount of code.Type: GrantFiled: March 27, 2013Date of Patent: April 11, 2017Assignee: FUJITSU LIMITEDInventors: Kimihiko Kazui, Satoshi Shimada, Akira Nakagawa, Hidenobu Miyoshi, Junpei Koyama